igt@kms_color_chamelium@pipe-a-gamma - warn - igt_frame-WARNING: Error average too high
https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_510/fi-icl-u2/igt@kms_color_chamelium@pipe-a-gamma.html
Starting subtest: pipe-A-gamma
(kms_color_chamelium:1299) igt_frame-WARNING: Error average too high (85.681796)
Subtest pipe-A-gamma: SUCCESS (17.254s)
7> [129.994829] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.146 [i915]] MG PLL 4
<7> [129.994919] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling AUX C TC1
<7> [129.995000] i915 0000:00:02.0: [drm:sandybridge_pcode_write_timeout [i915]] warning: pcode (write of 0x00000000 to mbox 12) mailbox access failed for icl_aux_power_well_enable [i915]: -6
<7> [129.995053] i915 0000:00:02.0: [drm:icl_aux_power_well_enable [i915]] TC cold block failed
<7> [129.995121] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling AUX D TC2
<7> [129.995217] i915 0000:00:02.0: [drm:sandybridge_pcode_write_timeout [i915]] warning: pcode (write of 0x00000000 to mbox 12) mailbox access failed for icl_aux_power_well_enable [i915]: -6
<7> [129.995265] i915 0000:00:02.0: [drm:icl_aux_power_well_enable [i915]] TC cold block failed
<7> [129.995343] i915 0000:00:02.0: [drm:gen9_dbuf_slices_update [i915]] Updating dbuf slices to 0x3
<7> [129.995449] i915 0000:00:02.0: [drm:intel_enable_shared_dpll [i915]] enable MG PLL 1 (active 1, on? 0) for crtc 91
<7> [129.995496] i915 0000:00:02.0: [drm:intel_enable_shared_dpll [i915]] enabling MG PLL 1
<7> [129.995639] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling DDI C IO
<7> [129.997711] i915 0000:00:02.0: [drm:intel_enable_pipe [i915]] enabling pipe A
<7> [129.999929] i915 0000:00:02.0: [drm:intel_fbc_enable [i915]] reserved 11827200 bytes of contiguous stolen space for FBC, threshold: 1
<7> [129.999975] i915 0000:00:02.0: [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
<7> [130.014640] i915 0000:00:02.0: [drm:gen9_dbuf_slices_update [i915]] Updating dbuf slices to 0x1
<7> [130.014991] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:238:HDMI-A-2]
<7> [130.015078] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [CRTC:91:pipe A]
<7> [130.015648] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.146 [i915]] MG PLL 1
<7> [130.015736] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling power well 4
<7> [130.015817] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [CRTC:213:pipe C]
<7> [130.065434] i915 0000:00:02.0: [drm:i915_fifo_underrun_reset_write [i915]] Re-arming FIFO underruns on pipe A
````