1. 08 Jun, 2018 8 commits
  2. 07 Jun, 2018 3 commits
  3. 06 Jun, 2018 3 commits
  4. 05 Jun, 2018 5 commits
  5. 04 Jun, 2018 1 commit
  6. 01 Jun, 2018 2 commits
  7. 31 May, 2018 4 commits
    • Chris Wilson's avatar
      lib: Double check ring measurement · ae0ea2a0
      Chris Wilson authored
      Check twice for the signal interrupting the execbuf, because the real
      world is messy.
      
      References: https://bugs.freedesktop.org/show_bug.cgi?id=106695Signed-off-by: Chris Wilson's avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Antonio Argenziano <antonio.argenziano@intel.com>
      Reviewed-by: Antonio Argenziano's avatarAntonio Argenziano <antonio.argenziano@intel.com>
      ae0ea2a0
    • Chris Wilson's avatar
      lib: Align ring measurement to timer · 94411f9b
      Chris Wilson authored
      After hitting the SIGINT from execbuf, wait until the next timer signal
      before trying again. This aligns the start of the ioctl to the timer,
      hopefully maximising the amount of time we have for processing before
      the next signal -- trying to prevent the case where we are scheduled out
      in the middle of processing and so hit the timer signal too early.
      
      References: https://bugs.freedesktop.org/show_bug.cgi?id=106695Signed-off-by: Chris Wilson's avatarChris Wilson <chris@chris-wilson.co.uk>
      Acked-by: Antonio Argenziano's avatarAntonio Argenziano <antonio.argenziano@intel.com>
      94411f9b
    • Chris Wilson's avatar
      lib: Assert that we do manage to submit at least one batch when measuring · fadf6e48
      Chris Wilson authored
      As we measure the ring size, we never expect to find we can not submit
      no batches at all. Assert against the unexpected.
      Signed-off-by: Chris Wilson's avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Antonio Argenziano <antonio.argenziano@intel.com>
      Reviewed-by: Antonio Argenziano's avatarAntonio Argenziano <antonio.argenziano@intel.com>
      fadf6e48
    • Tvrtko Ursulin's avatar
      intel-gpu-top: Rewrite the tool to be safe to use · 63f0bf3d
      Tvrtko Ursulin authored
      intel-gpu-top is a dangerous tool which can hang machines due unsafe mmio
      register access. This patch rewrites it to use only PMU.
      
      Only overall command streamer busyness and GPU global data such as power
      and frequencies are included in this new version.
      
      For access to more GPU functional unit level data, an OA metric based tool
      like gpu-top should be used instead.
      
      v2:
       * Sort engines by class and instance.
       * Do not wait for one sampling period to display something on screen.
       * Move code out of the asserts. (Rinat Ibragimov)
       * Continuously adapt to terminal size. (Rinat Ibragimov)
      
      v3:
       * Change layout and precision of some field. (Chris Wilson)
       Eero Tamminen:
       * Use more user friendly engine names.
       * Don't error out if a counter is missing.
       * Add IMC read/write bandwidth.
       * Report minimum required kernel version.
      
      v4:
       * Really support 4.16 by skipping of missing engines.
       * Simpler and less hacky float printing.
       * Preserve copyright header. (Antonio Argenziano)
       * Simplify engines_ptr macro. (Rinat Ibragimov)
      
      v5:
       * Get RAPL unit from sysfs.
       * Consolidate sysfs paths with a macro.
       * Tidy error handling by carrying over and reporting errno.
       * Check against console height on all prints.
       * More readable minimum kernel version message. (Eero Tamminen)
       * Column banner for per engine stats. (Eero Tamminen)
      
      v6:
       * Man page update. (Eero Tamminen)
      Signed-off-by: Tvrtko Ursulin's avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
      Cc: Petri Latvala <petri.latvala@intel.com>
      Cc: Eero Tamminen <eero.t.tamminen@intel.com>
      Cc: Rinat Ibragimov <ibragimovrinat@mail.ru>
      Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> # v1
      Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> # v0.5
      Reviewed-by: Matthew Auld's avatarMatthew Auld <matthew.auld@intel.com>
      63f0bf3d
  8. 30 May, 2018 1 commit
  9. 29 May, 2018 1 commit
    • Chris Wilson's avatar
      igt/gem_ctx_isolation: Test INSTPM back to gen6 · 43f7a746
      Chris Wilson authored
      Lionel pointed out that INSTPM was context saved, at least from gen6,
      not from gen9. The only caveat is that INSTPM is a masked register (the
      upper 16bits are a write-enable mask, the lower 16bits the value to
      change) and also contains a read-only counter bit (which counts flushes,
      and so flip flops between batches). Being a non-privileged register that
      userspace wants to manipulate, it is writable and readable from a
      userspace batch, so we can test whether or not a write from one context
      is visible from a second.
      Signed-off-by: Chris Wilson's avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Reviewed-by: Lionel Landwerlin's avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
      43f7a746
  10. 25 May, 2018 1 commit
  11. 24 May, 2018 5 commits
  12. 23 May, 2018 6 commits