Commit dda85fb1 authored by Daniel Vetter's avatar Daniel Vetter

tests: roll out igt_simple_init/igt_simple_main

Also use igt_skip a bit more to simplify some of the tests.
Signed-off-by: Daniel Vetter's avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent ce1a9f91
......@@ -118,10 +118,10 @@ TESTS_progs = \
gen3_render_mixed_blits \
gen3_render_tiledx_blits \
gen3_render_tiledy_blits \
prime_udl \
pm_psr \
pm_rc6_residency \
pm_rps \
prime_udl \
$(NULL)
# IMPORTANT: The ZZ_ tests need to be run last!
......
......@@ -32,7 +32,7 @@
/**
* Checks DRM_IOCTL_GET_CLIENT.
*/
int main(int argc, char **argv)
igt_simple_main
{
int fd, ret;
drm_client_t client;
......@@ -57,5 +57,4 @@ int main(int argc, char **argv)
igt_assert(ret == -1 && errno == EINVAL);
close(fd);
return 0;
}
......@@ -35,7 +35,7 @@
* I don't care too much about the actual contents, just that the kernel
* doesn't crash.
*/
int main(int argc, char **argv)
igt_simple_main
{
int fd, ret;
drm_stats_t stats;
......@@ -46,5 +46,4 @@ int main(int argc, char **argv)
igt_assert(ret == 0);
close(fd);
return 0;
}
......@@ -32,7 +32,7 @@
/**
* Checks DRM_IOCTL_GET_VERSION and libdrm's drmGetVersion() interface to it.
*/
int main(int argc, char **argv)
igt_simple_main
{
int fd;
drmVersionPtr v;
......@@ -45,5 +45,4 @@ int main(int argc, char **argv)
igt_assert(v->version_major >= 1);
drmFree(v);
close(fd);
return 0;
}
......@@ -53,7 +53,7 @@ struct intel_batchbuffer *batch;
#define BO_ARRAY_SIZE 35000
drm_intel_bo *bos[BO_ARRAY_SIZE];
int main(int argc, char **argv)
igt_simple_main
{
int fd;
int i;
......@@ -106,6 +106,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -53,7 +53,7 @@ struct intel_batchbuffer *batch;
/* we do both cpu and gtt maps, so only need half of 64k to exhaust */
int main(int argc, char **argv)
igt_simple_main
{
int fd;
int i;
......@@ -131,6 +131,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -54,7 +54,7 @@ struct intel_batchbuffer *batch;
#define BO_ARRAY_SIZE 68000
drm_intel_bo *bos[BO_ARRAY_SIZE];
int main(int argc, char **argv)
igt_simple_main
{
int fd;
int i;
......@@ -96,6 +96,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -55,7 +55,7 @@ struct intel_batchbuffer *batch;
#define BO_ARRAY_SIZE 68000
drm_intel_bo *bos[BO_ARRAY_SIZE];
int main(int argc, char **argv)
igt_simple_main
{
int fd;
int i;
......@@ -97,6 +97,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -116,7 +116,7 @@ static void exec0(int fd)
}
#endif
int main(int argc, char **argv)
igt_simple_main
{
int fd;
......@@ -129,6 +129,4 @@ int main(int argc, char **argv)
//exec0(fd);
close(fd);
return 0;
}
......@@ -153,7 +153,7 @@ uint32_t gen8_batch[] = {
uint32_t *batch = gen6_batch;
uint32_t batch_size = sizeof(gen6_batch);
int main(int argc, char **argv)
igt_simple_main
{
const uint32_t hang[] = {-1, -1, -1, -1};
const uint32_t end[] = {MI_BATCH_BUFFER_END, 0};
......@@ -175,10 +175,8 @@ int main(int argc, char **argv)
}
aper_size = gem_mappable_aperture_size();
if (intel_get_total_ram_mb() < aper_size / (1024*1024) * 2) {
fprintf(stderr, "not enough mem to run test\n");
return 77;
}
igt_skip_on_f(intel_get_total_ram_mb() < aper_size / (1024*1024) * 2,
"not enough mem to run test\n");
count = aper_size / 4096 * 2;
if (igt_run_in_simulation())
......@@ -242,6 +240,4 @@ int main(int argc, char **argv)
printf("Test suceeded, cleanup up - this might take a while.\n");
close(fd);
return 0;
}
......@@ -87,7 +87,7 @@ static void exec(int fd, uint32_t handle)
igt_assert(ret == 0);
}
int main(int argc, char **argv)
igt_simple_main
{
uint32_t batch_end[4] = {MI_BATCH_BUFFER_END, 0, 0, 0};
int fd, i, ret;
......@@ -164,6 +164,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -54,7 +54,7 @@ static void handle_bad(int ret, int lerrno, int expected, const char *desc)
}
}
int main(int argc, char *argv[])
igt_simple_main
{
struct local_drm_i915_context_destroy destroy;
uint32_t ctx_id;
......@@ -86,6 +86,4 @@ int main(int argc, char *argv[])
handle_bad(ret, errno, ENOENT, "default destroy");
close(fd);
igt_success();
}
......@@ -133,6 +133,8 @@ int main(int argc, char *argv[])
{
int i;
igt_simple_init();
fd = drm_open_any_render();
devid = intel_get_drm_devid(fd);
......@@ -156,5 +158,5 @@ int main(int argc, char *argv[])
free(threads);
close(fd);
igt_success();
return 0;
}
......@@ -37,7 +37,7 @@ struct local_drm_i915_gem_context_create {
#define CONTEXT_CREATE_IOCTL DRM_IOWR(DRM_COMMAND_BASE + 0x2d, struct local_drm_i915_gem_context_create)
int main(int argc, char *argv[])
igt_simple_main
{
int ret, fd;
struct local_drm_i915_gem_context_create create;
......@@ -60,6 +60,4 @@ int main(int argc, char *argv[])
igt_assert(create.ctx_id != 0);
close(fd);
igt_success();
}
......@@ -91,7 +91,7 @@ dummy_reloc_loop(void)
}
}
int main(int argc, char **argv)
igt_simple_main
{
int fd;
int devid;
......@@ -125,6 +125,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -246,6 +246,8 @@ int main(int argc, char **argv)
{
int i;
igt_simple_init();
igt_skip_on_simulation();
if (argc > 1) {
......
......@@ -111,7 +111,7 @@ static int exec(int fd, int num_exec, int num_relocs, unsigned flags)
}
#define ELAPSED(a,b) (1e6*((b)->tv_sec - (a)->tv_sec) + ((b)->tv_usec - (a)->tv_usec))
int main(int argc, char **argv)
igt_simple_main
{
uint32_t batch[2] = {MI_BATCH_BUFFER_END};
int fd, n, m, count;
......@@ -200,6 +200,4 @@ int main(int argc, char **argv)
printf("\n");
}
}
return 0;
}
......@@ -66,8 +66,7 @@ create_bo(int fd)
return handle;
}
int
main(int argc, char **argv)
igt_simple_main
{
int fd;
int i;
......@@ -103,6 +102,4 @@ main(int argc, char **argv)
igt_assert(ptr[i] == i);
close(fd);
return 0;
}
......@@ -59,6 +59,8 @@ int main(int argc, char **argv)
int loop, i, tiling;
int fd;
igt_simple_init();
igt_skip_on_simulation();
if (argc > 1)
......
......@@ -57,7 +57,7 @@ struct intel_batchbuffer *batch;
uint32_t blob[2048*2048];
#define MAX_BLT_SIZE 128
int main(int argc, char **argv)
igt_simple_main
{
drm_intel_bo *bo = NULL;
uint32_t tiling_mode = I915_TILING_X;
......@@ -122,6 +122,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -71,7 +71,7 @@ test_large_object(int fd)
/* kernel should clean this up for us */
}
int main(int argc, char **argv)
igt_simple_main
{
int fd;
......@@ -80,6 +80,4 @@ int main(int argc, char **argv)
fd = drm_open_any();
test_large_object(fd);
return 0;
}
......@@ -175,7 +175,7 @@ static int many_exec(int fd, uint32_t batch, int num_exec, int num_reloc, unsign
#define fail(x) ASSERT(_fail(x))
#define pass(x) ASSERT(!_fail(x))
int main(int argc, char **argv)
igt_simple_main
{
uint32_t batch[2] = {MI_BATCH_BUFFER_END};
uint32_t handle;
......@@ -240,6 +240,4 @@ int main(int argc, char **argv)
fail(many_exec(fd, handle, i+1, i, USE_LUT | BROKEN));
fail(many_exec(fd, handle, i+1, i+1, USE_LUT | BROKEN));
}
return 0;
}
......@@ -84,7 +84,7 @@ scratch_buf_check(data_t *data, struct scratch_buf *buf, int x, int y,
}
}
int main(int argc, char **argv)
igt_simple_main
{
data_t data = {0, };
struct intel_batchbuffer *batch = NULL;
......@@ -92,21 +92,19 @@ int main(int argc, char **argv)
media_fillfunc_t media_fill = NULL;
int i, j;
igt_fixture {
data.drm_fd = drm_open_any_render();
data.devid = intel_get_drm_devid(data.drm_fd);
data.drm_fd = drm_open_any_render();
data.devid = intel_get_drm_devid(data.drm_fd);
data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
igt_assert(data.bufmgr);
data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
igt_assert(data.bufmgr);
media_fill = get_media_fillfunc(data.devid);
media_fill = get_media_fillfunc(data.devid);
igt_require_f(media_fill,
"no media-fill function\n");
igt_require_f(media_fill,
"no media-fill function\n");
batch = intel_batchbuffer_alloc(data.bufmgr, data.devid);
igt_assert(batch);
}
batch = intel_batchbuffer_alloc(data.bufmgr, data.devid);
igt_assert(batch);
scratch_buf_init(&data, &dst, WIDTH, HEIGHT, STRIDE, COLOR_C4);
......
......@@ -77,7 +77,7 @@ create_and_map_bo(int fd)
gem_madvise(fd, handle, I915_MADV_DONTNEED);
}
int main(int argc, char **argv)
igt_simple_main
{
int fd, i;
......@@ -91,6 +91,4 @@ int main(int argc, char **argv)
create_and_map_bo(fd);
close(fd);
return 0;
}
......@@ -198,7 +198,7 @@ static uint32_t gem_pin(int fd, int handle, int alignment)
return pin.offset;
}
int main(int argc, char **argv)
igt_simple_main
{
const uint32_t batch[2] = {MI_BATCH_BUFFER_END};
struct timeval start, now;
......@@ -245,6 +245,4 @@ int main(int argc, char **argv)
gettimeofday(&now, NULL);
} while ((now.tv_sec - start.tv_sec)*1000 + (now.tv_usec - start.tv_usec) / 1000 < 10000);
igt_stop_signal_helper();
return 0;
}
......@@ -63,7 +63,7 @@ static uint64_t timer_query(int fd)
return reg_read.val;
}
int main(int argc, char *argv[])
igt_simple_main
{
struct local_drm_i915_reg_read reg_read;
int fd, ret;
......@@ -88,5 +88,4 @@ int main(int argc, char *argv[])
EINVAL, "bad register");
close(fd);
igt_success();
}
......@@ -114,6 +114,8 @@ int main(int argc, char **argv)
int opt_dump_png = false;
int opt_dump_aub = drmtest_dump_aub();
igt_simple_init();
while ((opt = getopt(argc, argv, "d")) != -1) {
switch (opt) {
case 'd':
......
......@@ -73,6 +73,8 @@ int main(int argc, char **argv)
uint32_t start = 0;
int i, j, fd, count;
igt_simple_init();
fd = drm_open_any();
render_copy = get_render_copyfunc(intel_get_drm_devid(fd));
......
......@@ -71,6 +71,8 @@ int main(int argc, char **argv)
uint32_t start = 0;
int i, j, fd, count;
igt_simple_init();
igt_skip_on_simulation();
fd = drm_open_any();
......
......@@ -90,17 +90,14 @@ store_dword_loop(int fd)
drm_intel_bo_unmap(target_buffer);
}
int main(int argc, char **argv)
igt_simple_main
{
int fd;
int devid;
fd = drm_open_any();
devid = intel_get_drm_devid(fd);
if (!HAS_BLT_RING(devid)) {
fprintf(stderr, "inter ring check needs gen6+\n");
return 77;
}
gem_require_ring(fd, I915_EXEC_BLT);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
......@@ -120,6 +117,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -641,6 +641,8 @@ int main(int argc, char **argv)
int wcount = 0;
int r = -1;
igt_simple_init();
parse_options(argc, argv);
card_index = drm_get_card();
......
......@@ -46,7 +46,7 @@
* Testcase: Check set_tiling vs gtt mmap coherency
*/
int main(int argc, char **argv)
igt_simple_main
{
int fd;
uint32_t *ptr;
......@@ -132,6 +132,4 @@ int main(int argc, char **argv)
munmap(ptr, OBJECT_SIZE);
close(fd);
return 0;
}
......@@ -46,7 +46,7 @@
* Testcase: Check set_tiling vs pwrite coherency
*/
int main(int argc, char **argv)
igt_simple_main
{
int fd;
uint32_t *ptr;
......@@ -94,6 +94,4 @@ int main(int argc, char **argv)
munmap(ptr, OBJECT_SIZE);
close(fd);
return 0;
}
......@@ -113,7 +113,7 @@ cont:
drm_intel_bo_unmap(target_buffer);
}
int main(int argc, char **argv)
igt_simple_main
{
int fd;
int devid;
......@@ -152,6 +152,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -113,7 +113,7 @@ cont:
drm_intel_bo_unmap(target_buffer);
}
int main(int argc, char **argv)
igt_simple_main
{
int fd;
int devid;
......@@ -155,6 +155,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -113,7 +113,7 @@ cont:
drm_intel_bo_unmap(target_buffer);
}
int main(int argc, char **argv)
igt_simple_main
{
int fd;
int devid;
......@@ -149,6 +149,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -100,7 +100,7 @@ cont:
drm_intel_bo_unmap(target_buffer);
}
int main(int argc, char **argv)
igt_simple_main
{
int fd;
......@@ -131,6 +131,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -86,7 +86,7 @@ static int copy_tile_threaded(drm_intel_bo *bo)
return 0;
}
int main(int argc, char **argv)
igt_simple_main
{
int fd;
drm_intel_bo *bo;
......@@ -119,6 +119,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -100,7 +100,7 @@ check_bo(int fd, drm_intel_bo *bo, uint32_t start_val)
}
}
int main(int argc, char **argv)
igt_simple_main
{
drm_intel_bo *bo[4096];
uint32_t bo_start_val[4096];
......@@ -170,6 +170,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -123,8 +123,7 @@ calculate_expected(int offset)
return (base_y + tile_y) * WIDTH + base_x + tile_x;
}
int
main(int argc, char **argv)
igt_simple_main
{
int fd;
int i, iter = 100;
......@@ -230,6 +229,4 @@ main(int argc, char **argv)
}
close(fd);
return 0;
}
......@@ -111,8 +111,7 @@ create_bo(int fd)
return handle;
}
int
main(int argc, char **argv)
igt_simple_main
{
int fd;
uint32_t *data;
......@@ -151,6 +150,4 @@ main(int argc, char **argv)
}
close(fd);
return 0;
}
......@@ -90,8 +90,7 @@ create_bo_and_fill(int fd)
uint32_t *bo_handles;
int *idx_arr;
int
main(int argc, char **argv)
igt_simple_main
{
int fd;
uint32_t *data;
......@@ -136,6 +135,4 @@ main(int argc, char **argv)
}
close(fd);
return 0;
}
......@@ -55,7 +55,7 @@ static void test_invalid_tiling(int fd, uint32_t handle, int stride)
* Testcase: Check that max fence stride works
*/
int main(int argc, char *argv[])
igt_simple_main
{
int fd;
uint32_t *ptr;
......@@ -135,6 +135,4 @@ int main(int argc, char *argv[])
munmap(ptr, size);
close(fd);
return 0;
}
......@@ -63,7 +63,7 @@ uint32_t devid;
uint32_t data[TEST_SIZE/4];
int main(int argc, char **argv)
igt_simple_main
{
int i, ret, fd, num_fences;
drm_intel_bo *busy_bo, *test_bo;
......@@ -164,6 +164,4 @@ int main(int argc, char **argv)
}
}
intel_batchbuffer_flush(batch);
return 0;
}
......@@ -51,7 +51,7 @@ static drm_intel_bufmgr *bufmgr;
struct intel_batchbuffer *batch;
static drm_intel_bo *load_bo;
int main(int argc, char **argv)
igt_simple_main
{
int fd, i;
......@@ -96,6 +96,4 @@ int main(int argc, char **argv)
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
return 0;
}
......@@ -247,6 +247,8 @@ int main(int argc, char **argv)
uint32_t start = 0;
int i, fd, count;
igt_simple_init();
igt_skip_on_simulation();
fd = drm_open_any();
......
......@@ -100,7 +100,7 @@ static void blt_color_fill(struct intel_batchbuffer *batch,
ADVANCE_BATCH();
}
<