Commit bc787766 authored by Chris Wilson's avatar Chris Wilson

lib: Refactor testing for ability to use MI_STORE_DATA_IMM

Rather than have the code in multiple locations, put a copy in lib/
Signed-off-by: Chris Wilson's avatarChris Wilson <chris@chris-wilson.co.uk>
parent 49e083a2
......@@ -557,3 +557,21 @@ const struct intel_execution_engine intel_execution_engines[] = {
{ "vebox", "vecs0", I915_EXEC_VEBOX, 0 },
{ NULL, 0, 0 }
};
bool gem_can_store_dword(int fd, unsigned int engine)
{
uint16_t devid = intel_get_drm_devid(fd);
const struct intel_device_info *info = intel_get_device_info(devid);
const int gen = ffs(info->gen);
if (gen <= 2) /* requires physical addresses */
return false;
if (gen == 6 && (engine & ~(3<<13)) == I915_EXEC_BSD)
return false; /* kills the machine! */
if (info->is_broadwater)
return false; /* Not sure yet... */
return true;
}
......@@ -78,5 +78,6 @@ extern const struct intel_execution_engine {
e__++) \
for_if (gem_has_ring(fd__, flags__ = e__->exec_id | e__->flags))
bool gem_can_store_dword(int fd, unsigned int engine);
#endif /* IGT_GT_H */
......@@ -183,9 +183,6 @@ static void i915_to_amd(int i915, int amd, amdgpu_device_handle device)
if (engine == 0)
continue;
if (engine == I915_EXEC_BSD)
continue;
engines[nengine++] = engine;
}
igt_require(nengine);
......
......@@ -42,11 +42,6 @@
#define ENGINE_MASK (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
static bool can_store_dword_imm(int fd)
{
return intel_gen(intel_get_drm_devid(fd)) > 2;
}
static void store_dword(int fd, unsigned ring)
{
const int gen = intel_gen(intel_get_drm_devid(fd));
......@@ -56,15 +51,12 @@ static void store_dword(int fd, unsigned ring)
uint32_t batch[16];
int i;
if (!can_store_dword_imm(fd))
if (!gem_can_store_dword(fd, ring))
return;
if (!gem_has_ring(fd, ring))
return;
if (gen == 6 && (ring & ~(3<<13)) == I915_EXEC_BSD)
return;
intel_detect_and_clear_missed_interrupts(fd);
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = (uintptr_t)obj;
......@@ -125,7 +117,7 @@ static void store_all(int fd)
int value;
int i, j;
if (!can_store_dword_imm(fd))
if (!gem_can_store_dword(fd, 0))
return;
memset(&execbuf, 0, sizeof(execbuf));
......@@ -160,7 +152,7 @@ static void store_all(int fd)
nengine = 0;
intel_detect_and_clear_missed_interrupts(fd);
for_each_engine(fd, engine) {
if (gen == 6 && (engine & ~(3<<13)) == I915_EXEC_BSD)
if (!gem_can_store_dword(fd, engine))
continue;
igt_assert(2*(nengine+1)*sizeof(batch) <= 4096);
......@@ -272,7 +264,8 @@ gem_exec_store(void)
igt_fork_hang_detector(fd);
for (e = intel_execution_engines; e->name; e++) {
store_dword(fd, e->exec_id | e->flags);
if (gem_can_store_dword(fd, e->exec_id | e->flags))
store_dword(fd, e->exec_id | e->flags);
}
store_all(fd);
......
......@@ -316,10 +316,10 @@ static void one(int fd, unsigned ring, uint32_t flags, unsigned test_flags)
if (e->exec_id == 0 || e->exec_id == ring)
continue;
if (e->exec_id == I915_EXEC_BSD && gen == 6)
if (!gem_has_ring(fd, e->exec_id | e->flags))
continue;
if (!gem_has_ring(fd, e->exec_id | e->flags))
if (!gem_can_store_dword(fd, e->exec_id | e->flags))
continue;
igt_debug("Testing %s in parallel\n", e->name);
......@@ -500,11 +500,6 @@ static void basic(int fd, unsigned ring, unsigned flags)
igt_spin_batch_free(fd, spin);
}
static bool can_store_dword_imm(int fd)
{
return intel_gen(intel_get_drm_devid(fd)) > 2;
}
igt_main
{
const struct intel_execution_engine *e;
......@@ -515,7 +510,7 @@ igt_main
igt_fixture {
fd = drm_open_driver_master(DRIVER_INTEL);
igt_require_gem(fd);
igt_require(can_store_dword_imm(fd));
igt_require(gem_can_store_dword(fd, 0));
}
igt_subtest_group {
......@@ -536,12 +531,9 @@ igt_main
}
igt_subtest_group {
int gen = 0;
igt_fixture {
igt_require(has_extended_busy_ioctl(fd));
gem_require_mmap_wc(fd);
gen = intel_gen(intel_get_drm_devid(fd));
}
for (e = intel_execution_engines; e->name; e++) {
......@@ -551,9 +543,7 @@ igt_main
igt_subtest_f("extended-%s", e->name) {
gem_require_ring(fd, e->exec_id | e->flags);
igt_skip_on_f(gen == 6 &&
e->exec_id == I915_EXEC_BSD,
"MI_STORE_DATA broken on gen6 bsd\n");
igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
gem_quiescent_gpu(fd);
one(fd, e->exec_id, e->flags, 0);
gem_quiescent_gpu(fd);
......@@ -567,9 +557,8 @@ igt_main
igt_subtest_f("extended-parallel-%s", e->name) {
gem_require_ring(fd, e->exec_id | e->flags);
igt_skip_on_f(gen == 6 &&
e->exec_id == I915_EXEC_BSD,
"MI_STORE_DATA broken on gen6 bsd\n");
igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
gem_quiescent_gpu(fd);
one(fd, e->exec_id, e->flags, PARALLEL);
gem_quiescent_gpu(fd);
......@@ -619,12 +608,9 @@ igt_main
}
igt_subtest_group {
int gen = 0;
igt_fixture {
igt_require(has_extended_busy_ioctl(fd));
gem_require_mmap_wc(fd);
gen = intel_gen(intel_get_drm_devid(fd));
}
for (e = intel_execution_engines; e->name; e++) {
......@@ -634,9 +620,8 @@ igt_main
igt_subtest_f("extended-hang-%s", e->name) {
gem_require_ring(fd, e->exec_id | e->flags);
igt_skip_on_f(gen == 6 &&
e->exec_id == I915_EXEC_BSD,
"MI_STORE_DATA broken on gen6 bsd\n");
igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
gem_quiescent_gpu(fd);
one(fd, e->exec_id, e->flags, HANG);
gem_quiescent_gpu(fd);
......
......@@ -46,14 +46,6 @@ struct shadow {
struct drm_i915_gem_relocation_entry reloc;
};
static void gem_require_store_dword(int fd, unsigned ring)
{
int gen = intel_gen(intel_get_drm_devid(fd));
ring &= ~(3 << 13);
igt_skip_on_f(gen == 6 && ring == I915_EXEC_BSD,
"MI_STORE_DATA broken on gen6 bsd\n");
}
static void setup(int fd, int gen, struct shadow *shadow)
{
uint32_t buf[16];
......@@ -96,7 +88,7 @@ static void can_test_ring(unsigned ring)
close(master);
igt_require_gem(fd);
gem_require_ring(fd, ring);
gem_require_store_dword(fd, ring);
igt_require(gem_can_store_dword(fd, ring));
close(fd);
}
......
......@@ -136,6 +136,9 @@ static void single(const char *name, bool all_engines)
#define MAX_LOOP 16
fd = drm_open_driver_master(DRIVER_INTEL);
igt_require_gem(fd);
igt_require(gem_can_store_dword(fd, 0));
gen = intel_gen(intel_get_drm_devid(fd));
num_engines = 0;
......
......@@ -147,10 +147,10 @@ static void one(int fd, unsigned ring, uint32_t flags)
if (e->exec_id == 0 || e->exec_id == ring)
continue;
if (e->exec_id == I915_EXEC_BSD && gen == 6)
if (!gem_has_ring(fd, e->exec_id | e->flags))
continue;
if (!gem_has_ring(fd, e->exec_id | e->flags))
if (!gem_can_store_dword(fd, e->exec_id | e->flags))
continue;
store_dword(fd, e->exec_id | e->flags,
......@@ -199,6 +199,7 @@ igt_main
igt_require_gem(fd);
gem_require_mmap_wc(fd);
igt_require(has_async_execbuf(fd));
igt_require(gem_can_store_dword(fd, 0));
igt_fork_hang_detector(fd);
}
......@@ -207,8 +208,10 @@ igt_main
if (e->exec_id == 0)
continue;
igt_subtest_f("concurrent-writes-%s", e->name)
igt_subtest_f("concurrent-writes-%s", e->name) {
igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
one(fd, e->exec_id, e->flags);
}
}
igt_fixture {
......
......@@ -48,11 +48,6 @@ struct sync_merge_data {
#define SYNC_IOC_MERGE _IOWR(SYNC_IOC_MAGIC, 3, struct sync_merge_data)
#endif
static bool can_mi_store_dword(int gen, unsigned engine)
{
return !(gen == 6 && (engine & ~(3<<13)) == I915_EXEC_BSD);
}
static void store(int fd, unsigned ring, int fence, uint32_t target, unsigned offset_value)
{
const int SCRATCH = 0;
......@@ -283,7 +278,7 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
i = 0;
for_each_engine(fd, engine) {
if (!can_mi_store_dword(gen, engine))
if (!gem_can_store_dword(fd, engine))
continue;
if (flags & NONBLOCK) {
......@@ -523,6 +518,7 @@ igt_main
igt_subtest_group {
igt_fixture {
igt_require(gem_has_ring(i915, e->exec_id | e->flags));
igt_require(gem_can_store_dword(i915, e->exec_id | e->flags));
}
igt_subtest_group {
......
......@@ -545,11 +545,6 @@ static const char *yesno(bool x)
return x ? "yes" : "no";
}
static bool can_store_dword_imm(int gen)
{
return gen > 2;
}
igt_main
{
const struct intel_execution_engine *e;
......@@ -579,7 +574,6 @@ igt_main
{ NULL }
};
unsigned cpu = x86_64_features();
int gen = -1;
int fd = -1;
igt_skip_on_simulation();
......@@ -589,8 +583,7 @@ igt_main
fd = drm_open_driver(DRIVER_INTEL);
igt_require_gem(fd);
gem_require_mmap_wc(fd);
gen = intel_gen(intel_get_drm_devid(fd));
igt_require(can_store_dword_imm(gen));
igt_require(gem_can_store_dword(fd, 0));
igt_info("Has LLC? %s\n", yesno(gem_has_llc(fd)));
if (cpu) {
......@@ -609,8 +602,7 @@ igt_main
igt_fixture {
gem_require_ring(fd, ring);
igt_skip_on_f(gen == 6 && e->exec_id == I915_EXEC_BSD,
"MI_STORE_DATA broken on gen6 bsd\n");
igt_require(gem_can_store_dword(fd, ring));
}
for (const struct batch *b = batches; b->name; b++) {
......
......@@ -28,14 +28,6 @@ IGT_TEST_DESCRIPTION("Fill the GTT with batches.");
#define BATCH_SIZE (4096<<10)
static void gem_require_store_dword(int fd, unsigned ring)
{
int gen = intel_gen(intel_get_drm_devid(fd));
ring &= ~(3 << 13);
igt_skip_on_f(gen == 6 && ring == I915_EXEC_BSD,
"MI_STORE_DATA broken on gen6 bsd\n");
}
static bool ignore_engine(int fd, unsigned engine)
{
if (engine == 0)
......@@ -138,14 +130,14 @@ static void fillgtt(int fd, unsigned ring, int timeout)
if (ignore_engine(fd, engine))
continue;
if (gen == 6 && e__->exec_id == I915_EXEC_BSD)
if (!gem_can_store_dword(fd, engine))
continue;
engines[nengine++] = engine;
}
} else {
gem_require_ring(fd, ring);
gem_require_store_dword(fd, ring);
igt_require(gem_can_store_dword(fd, ring));
engines[nengine++] = ring;
}
......@@ -209,11 +201,6 @@ static void fillgtt(int fd, unsigned ring, int timeout)
igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
}
static bool can_store_dword_imm(int fd)
{
return intel_gen(intel_get_drm_devid(fd)) > 2;
}
igt_main
{
const struct intel_execution_engine *e;
......@@ -224,7 +211,7 @@ igt_main
igt_fixture {
device = drm_open_driver(DRIVER_INTEL);
igt_require_gem(device);
igt_require(can_store_dword_imm(device));
igt_require(gem_can_store_dword(device, 0));
igt_fork_hang_detector(device);
}
......
......@@ -71,17 +71,12 @@ static void gem_require_context(int fd)
igt_require(__gem_context_create(fd));
}
static bool can_mi_store_dword(int gen, unsigned engine)
{
return gen > 2 && !(gen == 6 && (engine & ~(3<<13)) == I915_EXEC_BSD);
}
static bool ignore_engine(int gen, unsigned engine)
static bool ignore_engine(int fd, unsigned engine)
{
if (engine == 0)
return true;
if (!can_mi_store_dword(gen, engine))
if (!gem_can_store_dword(fd, engine))
return true;
return false;
......@@ -202,12 +197,12 @@ static void all(int fd, unsigned engine, unsigned flags)
nengine = 0;
if (engine == -1) {
for_each_engine(fd, engine) {
if (!ignore_engine(gen, engine))
if (!ignore_engine(fd, engine))
engines[nengine++] = engine;
}
} else {
igt_require(gem_has_ring(fd, engine));
igt_require(can_mi_store_dword(gen, engine));
igt_require(gem_can_store_dword(fd, engine));
engines[nengine++] = engine;
}
igt_require(nengine);
......
......@@ -190,6 +190,8 @@ static void from_gpu(int fd)
uint32_t reloc_handle;
uint64_t value;
igt_require(gem_can_store_dword(fd, 0));
memset(&obj, 0, sizeof(obj));
obj.handle = gem_create(fd, 4096);
gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
......@@ -231,11 +233,6 @@ static void from_gpu(int fd)
munmap(relocs, 4096);
}
static bool ignore_engine(int gen, unsigned engine)
{
return gen == 6 && (engine & ~(3<<13)) == I915_EXEC_BSD;
}
static void check_bo(int fd, uint32_t handle)
{
uint32_t *map;
......@@ -262,12 +259,12 @@ static void active(int fd, unsigned engine)
nengine = 0;
if (engine == -1) {
for_each_engine(fd, engine) {
if (!ignore_engine(gen, engine))
if (gem_can_store_dword(fd, engine))
engines[nengine++] = engine;
}
} else {
igt_require(gem_has_ring(fd, engine));
igt_require(!ignore_engine(gen, engine));
igt_require(gem_can_store_dword(fd, engine));
engines[nengine++] = engine;
}
igt_require(nengine);
......
......@@ -534,9 +534,7 @@ igt_main
igt_subtest_f("fifo-%s", e->name) {
gem_require_ring(fd, e->exec_id | e->flags);
igt_skip_on_f(intel_gen(intel_get_drm_devid(fd)) == 6 &&
e->exec_id == I915_EXEC_BSD,
"MI_STORE_DATA broken on gen6 bsd\n");
igt_require(gem_can_store_dword(fd, e->exec_id) | e->flags);
fifo(fd, e->exec_id | e->flags);
}
}
......@@ -556,9 +554,7 @@ igt_main
igt_subtest_group {
igt_fixture {
gem_require_ring(fd, e->exec_id | e->flags);
igt_skip_on_f(intel_gen(intel_get_drm_devid(fd)) == 6 &&
e->exec_id == I915_EXEC_BSD,
"MI_STORE_DATA broken on gen6 bsd\n");
igt_require(gem_can_store_dword(fd, e->exec_id) | e->flags);
}
igt_subtest_f("in-order-%s", e->name)
......
......@@ -45,8 +45,7 @@ static void store_dword(int fd, unsigned ring)
int i;
gem_require_ring(fd, ring);
igt_skip_on_f(gen == 6 && (ring & ~(3<<13)) == I915_EXEC_BSD,
"MI_STORE_DATA broken on gen6 bsd\n");
igt_require(gem_can_store_dword(fd, ring));
intel_detect_and_clear_missed_interrupts(fd);
memset(&execbuf, 0, sizeof(execbuf));
......@@ -140,7 +139,7 @@ static void store_all(int fd)
nengine = 0;
intel_detect_and_clear_missed_interrupts(fd);
for_each_engine(fd, engine) {
if (gen == 6 && (engine & ~(3<<13)) == I915_EXEC_BSD)
if (!gem_can_store_dword(fd, engine))
continue;
igt_assert(2*(nengine+1)*sizeof(batch) <= 4096);
......@@ -208,11 +207,6 @@ static void store_all(int fd)
igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
}
static bool can_store_dword_imm(int fd)
{
return intel_gen(intel_get_drm_devid(fd)) > 2;
}
static int print_welcome(int fd)
{
uint16_t devid = intel_get_drm_devid(fd);
......@@ -222,7 +216,7 @@ static int print_welcome(int fd)
igt_info("Running on %s (pci-id %04x, gen %d)\n",
info->codename, devid, ffs(info->gen));
igt_info("Can use MI_STORE_DWORD(virtual)? %s\n",
can_store_dword_imm(fd) ? "yes" : "no");
gem_can_store_dword(fd, 0) ? "yes" : "no");
err = 0;
if (drmIoctl(fd, DRM_IOCTL_I915_GEM_THROTTLE, 0))
......@@ -248,7 +242,7 @@ igt_main
igt_require(drmSetMaster(fd) == 0);
igt_require_gem(fd);
igt_require(can_store_dword_imm(fd));
igt_require(gem_can_store_dword(fd, 0));
igt_fork_hang_detector(fd);
}
......
......@@ -60,17 +60,12 @@ static void check_bo(int fd, uint32_t handle)
munmap(map, 4096);
}
static bool can_mi_store_dword(int gen, unsigned engine)
{
return gen > 2 && !(gen == 6 && (engine & ~(3<<13)) == I915_EXEC_BSD);
}
static bool ignore_engine(int gen, unsigned engine)
static bool ignore_engine(int fd, unsigned engine)
{
if (engine == 0)
return true;
if (!can_mi_store_dword(gen, engine))
if (!gem_can_store_dword(fd, engine))
return true;
return false;
......@@ -78,11 +73,10 @@ static bool ignore_engine(int gen, unsigned engine)
static void test_all(int fd, unsigned flags)
{
const int gen = intel_gen(intel_get_drm_devid(fd));
unsigned engine;
for_each_engine(fd, engine) {
if (!ignore_engine(gen, engine))
if (!ignore_engine(fd, engine))
run_test(fd, engine, flags & ~0xff);
}
}
......@@ -122,17 +116,17 @@ static void run_test(int fd, unsigned engine, unsigned flags)
*/
if (has_semaphores(fd)) {
for_each_engine(fd, engine) {
if (!ignore_engine(gen, engine))
if (!ignore_engine(fd, engine))
engines[nengine++] = engine;
}
} else {
igt_require(gem_has_ring(fd, 0));
igt_require(can_mi_store_dword(gen, 0));
igt_require(gem_can_store_dword(fd, 0));
engines[nengine++] = 0;
}
} else {
igt_require(gem_has_ring(fd, engine));
igt_require(can_mi_store_dword(gen, engine));
igt_require(gem_can_store_dword(fd, engine));
engines[nengine++] = engine;
}
igt_require(nengine);
......@@ -238,11 +232,6 @@ static void run_test(int fd, unsigned engine, unsigned flags)
test_all(fd, flags);
}
static bool can_store_dword_imm(int fd)
{
return intel_gen(intel_get_drm_devid(fd)) > 2;
}
igt_main
{
const struct {
......@@ -260,7 +249,7 @@ igt_main
igt_fixture {
fd = drm_open_driver_master(DRIVER_INTEL);
igt_require_gem(fd);
igt_require(can_store_dword_imm(fd));
igt_require(gem_can_store_dword(fd, 0));
igt_fork_hang_detector(fd);
}
......
......@@ -91,17 +91,12 @@ static int __gem_context_create(int fd, uint32_t *ctx_id)
return ret;
}
static bool can_mi_store_dword(int gen, unsigned engine)
{
return gen > 2 && !(gen == 6 && (engine & ~(3<<13)) == I915_EXEC_BSD);
}
static bool ignore_engine(int gen, unsigned engine)
static bool ignore_engine(int fd, unsigned engine)
{
if (engine == 0)
return true;
if (!can_mi_store_dword(gen, engine))
if (!gem_can_store_dword(fd, engine))
return true;
return false;
......@@ -223,12 +218,12 @@ static void whisper(int fd, unsigned engine, unsigned flags)
nengine = 0;
if (engine == -1) {
for_each_engine(fd, engine) {
if (!ignore_engine(gen, engine))
if (!ignore_engine(fd, engine))
engines[nengine++] = engine;
}
} else {
igt_require(gem_has_ring(fd, engine));
igt_require(can_mi_store_dword(gen, engine));
igt_require(gem_can_store_dword(fd, engine));
engines[nengine++] = engine;
}
igt_require(nengine);
......@@ -534,11 +529,6 @@ out:
close(dir);
}
static bool can_store_dword_imm(int fd)
{
return intel_gen(intel_get_drm_devid(fd)) > 2;
}
igt_main
{
const struct mode {
......@@ -570,7 +560,7 @@ igt_main
igt_fixture {
fd = drm_open_driver_master(DRIVER_INTEL);
igt_require_gem(fd);
igt_require(can_store_dword_imm(fd));
igt_require(gem_can_store_dword(fd, 0));
print_welcome(fd);
igt_fork_hang_detector(fd);
......
......@@ -170,15 +170,13 @@ static int setup_execbuf(int fd,
static void run_test(int fd, unsigned ring, unsigned flags, unsigned timeout)
{
const int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj[2];
struct drm_i915_gem_relocation_entry reloc[1024];
struct drm_i915_gem_execbuffer2 execbuf;
igt_hang_t hang;
gem_require_ring(fd, ring);
igt_skip_on_f(gen == 6 && (ring & ~(3<<13)) == I915_EXEC_BSD,
"MI_STORE_DATA broken on gen6 bsd\n");
igt_require(gem_can_store_dword(fd, ring));
if (flags & (SUSPEND | HIBERNATE))
run_test(fd, ring, 0, 0);
......@@ -238,11 +236,6 @@ static void run_test(int fd, unsigned ring, unsigned flags, unsigned timeout)
run_test(fd, ring, 0, 0);
}
static bool can_store_dword_imm(int fd)
{
return intel_gen(intel_get_drm_devid(fd)) > 2;
}
struct cork {
int device;
uint32_t handle;
......@@ -358,7 +351,7 @@ igt_main
fd = drm_open_driver(DRIVER_INTEL);
igt_require_gem(fd);
igt_require(can_store_dword_imm(fd));
igt_require(gem_can_store_dword(fd, 0));
gen = intel_gen(intel_get_drm_devid(fd));
if (gen > 3 && gen < 6) { /* ctg and ilk need secure batches */
igt_require(drmSetMaster(fd) == 0);
......
......@@ -483,6 +483,7 @@ igt_main
fd = drm_open_driver_master(DRIVER_INTEL);
igt_require_gem(fd);
igt_require(gem_has_softpin(fd));
igt_require(gem_can_store_dword(fd, 0));
}
igt_subtest("invalid")
......
......@@ -163,8 +163,7 @@ static void
check_test_requirements(int fd, int ringid)
{
gem_require_ring(fd, ringid);
igt_skip_on_f(intel_gen(devid) == 6 && ringid == I915_EXEC_BSD,
"MI_STORE_DATA broken on gen6 bsd\n");
igt_require(gem_can_store_dword(fd, ringid));
}
igt_main
......
......@@ -75,11 +75,6 @@ out:
return ts.tv_sec + 1e-9*ts.tv_nsec;
}
static bool can_mi_store_dword(int gen, unsigned engine)
{
return gen > 2 && !(gen == 6 && (engine & ~(3<<13)) == I915_EXEC_BSD);
}
static void
sync_ring(int fd, unsigned ring, int num_children, int timeout)
{
......@@ -171,7 +166,7 @@ store_ring(int fd, unsigned ring, int num_children, int timeout)
if (!gem_has_ring(fd, e->exec_id | e->flags))
continue;
if (!can_mi_store_dword(gen, e->exec_id))
if (!gem_can_store_dword(fd, e->exec_id | e->flags))
continue;
if (e->exec_id == I915_EXEC_BSD) {
......@@ -189,7 +184,7 @@ store_ring(int fd, unsigned ring, int num_children, int timeout)
num_children *= num_engines;
} else {
gem_require_ring(fd, ring);
igt_require(can_mi_store_dword(gen, ring));
igt_require(gem_can_store_dword(fd, ring));
names[num_engines] = NULL;
engines[num_engines++] = ring;
}
......@@ -454,7 +449,6 @@ __store_many(int fd, unsigned ring, int timeout, unsigned long *cycles)
static void
store_many(int fd, unsigned ring, int timeout)
{