Commit 8ae86621 authored by Michał Winiarski's avatar Michał Winiarski

lib/igt_device: Move intel_get_pci_device under igt_device

It allows us to make things a little bit more generic. Also, we now
require fd rather than doing guesswork when it comes to pci address.

v2: Use readlinkat rather than string concat, move stuff around, provide
a version that does not assert. (Chris)
v3: Print addr on failure, avoid assignment in conditionals. (Chris)
Signed-off-by: Michał Winiarski's avatarMichał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson's avatarChris Wilson <chris@chris-wilson.co.uk>
parent 1bbe0b11
Pipeline #25014 passed with stages
in 4 minutes and 16 seconds
......@@ -44,6 +44,8 @@
#include <sys/resource.h>
#include "drm.h"
#include "igt_device.h"
#define LOCAL_I915_EXEC_FENCE_IN (1<<16)
#define LOCAL_I915_EXEC_FENCE_OUT (1<<17)
......@@ -456,7 +458,7 @@ static int run(int seconds,
if (gen < 6)
return IGT_EXIT_SKIP; /* Needs BCS timestamp */
intel_register_access_init(intel_get_pci_device(), false, fd);
intel_register_access_init(igt_device_get_pci_device(fd), false, fd);
if (gen == 6)
timestamp_reg = REG(RCS_TIMESTAMP);
......
......@@ -41,7 +41,6 @@
#include <limits.h>
#include <pthread.h>
#include "intel_chipset.h"
#include "intel_reg.h"
#include "drm.h"
......@@ -50,6 +49,7 @@
#include "intel_io.h"
#include "igt_aux.h"
#include "igt_device.h"
#include "igt_rand.h"
#include "igt_perf.h"
#include "sw_sync.h"
......@@ -2223,7 +2223,7 @@ static void init_clocks(void)
uint32_t rcs_start, rcs_end;
double overhead, t;
intel_register_access_init(intel_get_pci_device(), false, fd);
intel_register_access_init(igt_device_get_pci_device(fd), false, fd);
if (verbose <= 1)
return;
......
......@@ -29,7 +29,6 @@
#include <stdio.h>
#include <stdlib.h>
#include "intel_io.h"
#include "intel_chipset.h"
struct eu_rdata {
union {
......@@ -133,7 +132,11 @@ find_stuck_threads(void)
int main(int argc, char *argv[]) {
struct pci_device *pci_dev;
pci_dev = intel_get_pci_device();
int fd;
fd = drm_open_driver(DRIVER_INTEL);
pci_dev = igt_device_get_pci_device(fd);
close(fd);
intel_register_access_init(pci_dev, 1);
find_stuck_threads();
......
......@@ -42,7 +42,6 @@
#include "drm.h"
#include "i915_drm.h"
#include "drmtest.h"
#include "intel_chipset.h"
#include "intel_bufmgr.h"
#include "intel_io.h"
#include "intel_batchbuffer.h"
......@@ -506,7 +505,7 @@ int main(int argc, char* argv[]) {
struct pci_device *pci_dev;
volatile uint8_t *scratch = NULL;
int bits[64];
int devid = -1, opt;
int devid = -1, opt, fd;
while ((opt = getopt(argc, argv, "cdr:pf?h")) != -1) {
switch (opt) {
......@@ -533,7 +532,10 @@ int main(int argc, char* argv[]) {
}
}
pci_dev = intel_get_pci_device();
fd = drm_open_driver(DRIVER_INTEL);
pci_dev = igt_device_get_pci_device(fd);
close(fd);
if (devid == -1)
devid = pci_dev->device_id;
if (identify_device(devid)) {
......
......@@ -26,6 +26,7 @@
#include <sys/sysmacros.h>
#include "igt.h"
#include "igt_device.h"
#include "igt_sysfs.h"
int __igt_device_set_master(int fd)
{
......@@ -103,3 +104,122 @@ int igt_device_get_card_index(int fd)
return minor(st.st_rdev);
}
#define IGT_DEV_PATH_LEN 80
static bool igt_device_is_pci(int fd)
{
char path[IGT_DEV_PATH_LEN];
char *subsystem;
int sysfs;
int len;
sysfs = igt_sysfs_open(fd);
if (sysfs == -1)
return false;
len = readlinkat(sysfs, "device/subsystem", path, sizeof(path) - 1);
if (len == -1)
return false;
path[len] = '\0';
subsystem = strrchr(path, '/');
if (!subsystem)
return false;
return strcmp(subsystem, "/pci") == 0;
}
struct igt_pci_addr {
unsigned int domain;
unsigned int bus;
unsigned int device;
unsigned int function;
};
static int igt_device_get_pci_addr(int fd, struct igt_pci_addr *pci)
{
char path[IGT_DEV_PATH_LEN];
char *buf;
int sysfs;
int len;
if (!igt_device_is_pci(fd))
return -ENODEV;
sysfs = igt_sysfs_open(fd);
if (sysfs == -1)
return -ENOENT;
len = readlinkat(sysfs, "device", path, sizeof(path) - 1);
if (len == -1)
return -ENOENT;
path[len] = '\0';
buf = strrchr(path, '/');
if (!buf)
return -ENOENT;
if (sscanf(buf, "/%4x:%2x:%2x.%2x",
&pci->domain, &pci->bus,
&pci->device, &pci->function) != 4) {
igt_warn("Unable to extract PCI device address from '%s'\n", buf);
return -ENOENT;
}
return 0;
}
static struct pci_device *__igt_device_get_pci_device(int fd)
{
struct igt_pci_addr pci_addr;
struct pci_device *pci_dev;
if (igt_device_get_pci_addr(fd, &pci_addr)) {
igt_warn("Unable to find device PCI address\n");
return NULL;
}
if (pci_system_init()) {
igt_warn("Couldn't initialize PCI system\n");
return NULL;
}
pci_dev = pci_device_find_by_slot(pci_addr.domain,
pci_addr.bus,
pci_addr.device,
pci_addr.function);
if (!pci_dev) {
igt_warn("Couldn't find PCI device %04x:%02x:%02x:%02x\n",
pci_addr.domain, pci_addr.bus,
pci_addr.device, pci_addr.function);
return NULL;
}
if (pci_device_probe(pci_dev)) {
igt_warn("Couldn't probe PCI device\n");
return NULL;
}
return pci_dev;
}
/**
* igt_device_get_pci_device:
*
* @fd: the device
*
* Looks up the main graphics pci device using libpciaccess.
*
* Returns:
* The pci_device, skips the test on any failures.
*/
struct pci_device *igt_device_get_pci_device(int fd)
{
struct pci_device *pci_dev;
pci_dev = __igt_device_get_pci_device(fd);
igt_require(pci_dev);
return pci_dev;
}
......@@ -32,5 +32,6 @@ int __igt_device_drop_master(int fd);
void igt_device_drop_master(int fd);
int igt_device_get_card_index(int fd);
struct pci_device *igt_device_get_pci_device(int fd);
#endif /* __IGT_DEVICE_H__ */
......@@ -61,57 +61,6 @@
*/
enum pch_type intel_pch;
/**
* intel_get_pci_device:
*
* Looks up the main graphics pci device using libpciaccess.
*
* Returns:
* The pci_device, exits the program on any failures.
*/
struct pci_device *
intel_get_pci_device(void)
{
struct pci_device *pci_dev;
int error;
error = pci_system_init();
igt_fail_on_f(error != 0,
"Couldn't initialize PCI system\n");
/* Grab the graphics card. Try the canonical slot first, then
* walk the entire PCI bus for a matching device. */
pci_dev = pci_device_find_by_slot(0, 0, 2, 0);
if (pci_dev == NULL || pci_dev->vendor_id != 0x8086) {
struct pci_device_iterator *iter;
struct pci_id_match match;
match.vendor_id = 0x8086; /* Intel */
match.device_id = PCI_MATCH_ANY;
match.subvendor_id = PCI_MATCH_ANY;
match.subdevice_id = PCI_MATCH_ANY;
match.device_class = 0x3 << 16;
match.device_class_mask = 0xff << 16;
match.match_data = 0;
iter = pci_id_match_iterator_create(&match);
pci_dev = pci_device_next(iter);
pci_iterator_destroy(iter);
}
igt_require_f(pci_dev, "Couldn't find Intel graphics card\n");
error = pci_device_probe(pci_dev);
igt_fail_on_f(error != 0,
"Couldn't probe graphics card\n");
if (pci_dev->vendor_id != 0x8086)
errx(1, "Graphics card is non-intel");
return pci_dev;
}
/**
* intel_get_drm_devid:
* @fd: open i915 drm file descriptor
......
......@@ -31,7 +31,6 @@
#include <pciaccess.h>
#include <stdbool.h>
struct pci_device *intel_get_pci_device(void);
uint32_t intel_get_drm_devid(int fd);
struct intel_device_info {
......
......@@ -112,7 +112,7 @@ intel_mmio_use_dump_file(char *file)
*
* Sets up #igt_global_mmio to point at the mmio bar.
*
* @pci_dev can be obtained from intel_get_pci_device().
* @pci_dev can be obtained from igt_device_get_pci_device().
*/
void
intel_mmio_use_pci_bar(struct pci_device *pci_dev)
......@@ -162,7 +162,7 @@ release_forcewake_lock(int fd)
*
* It also initializes #igt_global_mmio like intel_mmio_use_pci_bar().
*
* @pci_dev can be obtained from intel_get_pci_device().
* @pci_dev can be obtained from igt_device_get_pci_device().
*/
int
intel_register_access_init(struct pci_device *pci_dev, int safe, int fd)
......
......@@ -53,6 +53,7 @@
#include "intel_chipset.h"
#include "intel_io.h"
#include "igt_debugfs.h"
#include "igt_device.h"
#include "igt_sysfs.h"
#include "config.h"
......@@ -1096,9 +1097,9 @@ uint64_t gem_aperture_size(int fd)
*
* Returns: The mappable gtt address space size.
*/
uint64_t gem_mappable_aperture_size(void)
uint64_t gem_mappable_aperture_size(int fd)
{
struct pci_device *pci_dev = intel_get_pci_device();
struct pci_device *pci_dev = igt_device_get_pci_device(fd);
int bar;
if (intel_gen(pci_dev->device_id) < 3)
......
......@@ -136,7 +136,7 @@ uint64_t gem_total_stolen_size(int fd);
uint64_t gem_available_aperture_size(int fd);
uint64_t gem_aperture_size(int fd);
uint64_t gem_global_aperture_size(int fd);
uint64_t gem_mappable_aperture_size(void);
uint64_t gem_mappable_aperture_size(int fd);
bool gem_has_softpin(int fd);
bool gem_has_exec_fence(int fd);
......
......@@ -1850,7 +1850,7 @@ igt_main
c->name, s->name, "small");
igt_subtest_group {
igt_fixture {
count = num_buffers(gem_mappable_aperture_size()/4,
count = num_buffers(gem_mappable_aperture_size(fd)/4,
s, c, CHECK_RAM);
}
run_modes(name, c, modes, s, count);
......@@ -1861,7 +1861,7 @@ igt_main
c->name, s->name, "thrash");
igt_subtest_group {
igt_fixture {
count = num_buffers(gem_mappable_aperture_size(),
count = num_buffers(gem_mappable_aperture_size(fd),
s, c, CHECK_RAM);
}
run_modes(name, c, modes, s, count);
......@@ -1893,7 +1893,7 @@ igt_main
c->name, s->name, "shrink");
igt_subtest_group {
igt_fixture {
count = num_buffers(gem_mappable_aperture_size(),
count = num_buffers(gem_mappable_aperture_size(fd),
s, c, CHECK_RAM);
igt_fork_shrink_helper(fd);
......@@ -1909,8 +1909,8 @@ igt_main
c->name, s->name, "swap");
igt_subtest_group {
igt_fixture {
if (intel_get_avail_ram_mb() > gem_mappable_aperture_size()/(1024*1024)) {
pin_sz = intel_get_avail_ram_mb() - gem_mappable_aperture_size()/(1024*1024);
if (intel_get_avail_ram_mb() > gem_mappable_aperture_size(fd)/(1024*1024)) {
pin_sz = intel_get_avail_ram_mb() - gem_mappable_aperture_size(fd)/(1024*1024);
igt_debug("Pinning %lld MiB\n", (long long)pin_sz);
pin_sz *= 1024 * 1024;
......@@ -1924,7 +1924,7 @@ igt_main
igt_require(pinned);
}
count = num_buffers(gem_mappable_aperture_size(),
count = num_buffers(gem_mappable_aperture_size(fd),
s, c, CHECK_RAM | CHECK_SWAP);
}
run_modes(name, c, modes, s, count);
......
......@@ -283,7 +283,7 @@ igt_main
run_test(i915, 1);
igt_subtest("full") {
uint64_t aper_size = gem_mappable_aperture_size();
uint64_t aper_size = gem_mappable_aperture_size(i915);
unsigned long count = aper_size / 4096 + 1;
intel_require_memory(count, 4096, CHECK_RAM);
......@@ -292,7 +292,7 @@ igt_main
}
igt_subtest("forked") {
uint64_t aper_size = gem_mappable_aperture_size();
uint64_t aper_size = gem_mappable_aperture_size(i915);
unsigned long count = aper_size / 4096 + 1;
int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
......
......@@ -40,6 +40,7 @@
#include "drm.h"
#include "igt_device.h"
#include "igt_sysfs.h"
#include "igt_vgem.h"
#include "igt_dummyload.h"
......@@ -679,7 +680,7 @@ igt_main
if (ring_size > 1024)
ring_size = 1024;
intel_register_access_init(intel_get_pci_device(), false, device);
intel_register_access_init(igt_device_get_pci_device(device), false, device);
rcs_clock = clockrate(device, RCS_TIMESTAMP);
igt_info("RCS timestamp clock: %.0fKHz, %.1fns\n",
rcs_clock / 1e3, 1e9 / rcs_clock);
......
......@@ -30,6 +30,8 @@
#include <drm.h>
#include "igt_device.h"
#ifndef I915_PARAM_CMD_PARSER_VERSION
#define I915_PARAM_CMD_PARSER_VERSION 28
#endif
......@@ -530,7 +532,7 @@ igt_main
#undef REG
igt_fixture {
intel_register_access_init(intel_get_pci_device(), 0, fd);
intel_register_access_init(igt_device_get_pci_device(fd), 0, fd);
}
for (int i = 0; i < ARRAY_SIZE(lris); i++) {
......
......@@ -53,10 +53,10 @@ test_huge_bo(int huge)
switch (huge) {
case -1:
huge_object_size = gem_mappable_aperture_size() / 2;
huge_object_size = gem_mappable_aperture_size(fd) / 2;
break;
case 0:
huge_object_size = gem_mappable_aperture_size() + PAGE_SIZE;
huge_object_size = gem_mappable_aperture_size(fd) + PAGE_SIZE;
break;
case 1:
huge_object_size = gem_aperture_size(fd) + PAGE_SIZE;
......
......@@ -527,7 +527,7 @@ test_huge_bo(int fd, int huge, int tiling)
switch (huge) {
case -1:
size = gem_mappable_aperture_size() / 2;
size = gem_mappable_aperture_size(fd) / 2;
/* Power of two fence size, natural fence
* alignment, and the guard page at the end
......@@ -542,7 +542,7 @@ test_huge_bo(int fd, int huge, int tiling)
size /= 2;
break;
case 0:
size = gem_mappable_aperture_size() + PAGE_SIZE;
size = gem_mappable_aperture_size(fd) + PAGE_SIZE;
break;
default:
size = gem_global_aperture_size(fd) + PAGE_SIZE;
......@@ -623,13 +623,13 @@ test_huge_copy(int fd, int huge, int tiling_a, int tiling_b, int ncpus)
switch (huge) {
case -2:
huge_object_size = gem_mappable_aperture_size() / 4;
huge_object_size = gem_mappable_aperture_size(fd) / 4;
break;
case -1:
huge_object_size = gem_mappable_aperture_size() / 2;
huge_object_size = gem_mappable_aperture_size(fd) / 2;
break;
case 0:
huge_object_size = gem_mappable_aperture_size() + PAGE_SIZE;
huge_object_size = gem_mappable_aperture_size(fd) + PAGE_SIZE;
break;
case 1:
huge_object_size = gem_global_aperture_size(fd) + PAGE_SIZE;
......
......@@ -89,7 +89,7 @@ static void test_big_cpu(int fd, int scale, unsigned flags)
switch (scale) {
case 0:
size = gem_mappable_aperture_size() + 4096;
size = gem_mappable_aperture_size(fd) + 4096;
break;
case 1:
size = gem_global_aperture_size(fd) + 4096;
......@@ -151,7 +151,7 @@ static void test_big_gtt(int fd, int scale, unsigned flags)
igt_require(gem_mmap__has_wc(fd));
switch (scale) {
case 0:
size = gem_mappable_aperture_size() + 4096;
size = gem_mappable_aperture_size(fd) + 4096;
break;
case 1:
size = gem_global_aperture_size(fd) + 4096;
......
......@@ -409,7 +409,7 @@ igt_main
* we expect the shrinker to start purging objects,
* and possibly fail.
*/
alloc_size = gem_mappable_aperture_size() / 2;
alloc_size = gem_mappable_aperture_size(fd) / 2;
num_processes = 1 + (mem_size / (alloc_size >> 20));
igt_info("Using %d processes and %'lluMiB per process\n",
......
......@@ -30,6 +30,7 @@
#include <fcntl.h>
#include <unistd.h>
#include "igt_device.h"
static bool supports_lpsp(uint32_t devid)
{
......@@ -210,7 +211,7 @@ igt_main
igt_require(supports_lpsp(devid));
intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
intel_register_access_init(igt_device_get_pci_device(drm_fd), 0, drm_fd);
kmstest_set_vt_graphics_mode();
}
......
......@@ -1368,7 +1368,7 @@ static void gem_evict_pwrite_subtest(void)
unsigned int num_trash_bos, n;
uint32_t buf;
num_trash_bos = gem_mappable_aperture_size() / (1024*1024) + 1;
num_trash_bos = gem_mappable_aperture_size(drm_fd) / (1024*1024) + 1;
trash_bos = malloc(num_trash_bos * sizeof(*trash_bos));
igt_assert(trash_bos);
......@@ -1412,7 +1412,7 @@ static bool device_in_pci_d3(void)
uint16_t val;
int rc;
rc = pci_device_cfg_read_u16(intel_get_pci_device(), &val, 0xd4);
rc = pci_device_cfg_read_u16(igt_device_get_pci_device(drm_fd), &val, 0xd4);
igt_assert_eq(rc, 0);
igt_debug("%s: PCI D3 state=%d\n", __func__, val & 0x3);
......
......@@ -1224,7 +1224,7 @@ static void run_test_on_crtc_set(struct test_output *o, int *crtc_idxs,
/* 256 MB is usually the maximum mappable aperture,
* (make it 4x times that to ensure failure) */
if (o->flags & TEST_BO_TOOBIG) {
bo_size = 4*gem_mappable_aperture_size();
bo_size = 4*gem_mappable_aperture_size(drm_fd);
igt_require(bo_size < gem_global_aperture_size(drm_fd));
}
......
......@@ -447,8 +447,8 @@ test_aperture_limit(void)
char *ptr1, *ptr2;
uint32_t handle1, handle2;
/* Two buffers the sum of which > mappable aperture */
uint64_t size1 = (gem_mappable_aperture_size() * 7) / 8;
uint64_t size2 = (gem_mappable_aperture_size() * 3) / 8;
uint64_t size1 = (gem_mappable_aperture_size(fd) * 7) / 8;
uint64_t size2 = (gem_mappable_aperture_size(fd) * 3) / 8;
handle1 = gem_create(fd, size1);
fill_bo(handle1, BO_SIZE);
......
......@@ -32,6 +32,7 @@
#include <string.h>
#include <err.h>
#include <arpa/inet.h>
#include "igt_device.h"
#include "intel_io.h"
#include "intel_reg.h"
#include "intel_chipset.h"
......@@ -2464,8 +2465,12 @@ static void dump_braswell(void)
int main(int argc, char **argv)
{
struct pci_device *pci_dev;
int fd;
fd = drm_open_driver(DRIVER_INTEL);
pci_dev = igt_device_get_pci_device(fd);
close(fd);
pci_dev = intel_get_pci_device();
devid = pci_dev->device_id; /* XXX not true when mapping! */
do_self_tests();
......@@ -2493,5 +2498,7 @@ int main(int argc, char **argv)
dump_eaglelake();
}
close(fd);
return 0;
}
......@@ -30,8 +30,9 @@
#include <stdio.h>
#include <string.h>
#include "drmtest.h"
#include "igt_device.h"
#include "intel_io.h"
#include "intel_chipset.h"
#include "intel_reg.h"
/* XXX PCH only today */
......@@ -39,8 +40,11 @@
int main(int argc, char** argv)
{
uint32_t current, max;
int fd;
intel_mmio_use_pci_bar(intel_get_pci_device());
fd = drm_open_driver(DRIVER_INTEL);
intel_mmio_use_pci_bar(igt_device_get_pci_device(fd));
close(fd);
current = INREG(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
max = INREG(BLC_PWM_PCH_CTL2) >> 16;
......
......@@ -36,6 +36,7 @@
#include "intel_io.h"
#include "intel_reg.h"
#include "igt_debugfs.h"
#include "igt_device.h"
#include "drmtest.h"
#include "igt_aux.h"
......@@ -971,6 +972,7 @@ int main(int argc, char *argv[])
uint32_t a, b;
enum test test = TEST_INVALID;
const int count = ARRAY_SIZE(min)/2;
int fd;
for (;;) {
static const struct option long_options[] = {
......@@ -1046,7 +1048,8 @@ int main(int argc, char *argv[])
}
}
devid = intel_get_pci_device()->device_id;
fd = drm_open_driver(DRIVER_INTEL);
devid = igt_device_get_pci_device(fd)->device_id;
/*
* check if the requires registers are
......@@ -1187,7 +1190,7 @@ int main(int argc, char *argv[])
break;
}
intel_register_access_init(intel_get_pci_device(), 0, -1);
intel_register_access_init(igt_device_get_pci_device(fd), 0, -1);
printf("%s?\n", test_name(test, pipe, bit, test_pixelcount));
......@@ -1263,6 +1266,7 @@ int main(int argc, char *argv[])
}
intel_register_access_fini();
close(fd);
if (quit)
return 0;
......
......@@ -34,8 +34,8 @@
#include <stdlib.h>
#include <syslog.h>
#include <unistd.h>
#include "igt_device.h"
#include "intel_io.h"
#include "intel_chipset.h"
#include "drmtest.h"
bool daemonized;
......@@ -65,6 +65,7 @@ is_alive(void) {
int main(int argc, char *argv[])
{
int ret;
int fd;
if (argc > 2 || (argc == 2 && !strncmp(argv[1], "-h", 2))) {
help(argv[1]);
......@@ -80,24 +81,27 @@ int main(int argc, char *argv[])
INFO_PRINT("started daemon");
}
ret = intel_register_access_init(intel_get_pci_device(), 1, -1);
fd = drm_open_driver(DRIVER_INTEL);
ret = intel_register_access_init(igt_device_get_pci_device(fd), 1, -1);
if (ret) {
INFO_PRINT("Couldn't init register access\n");
exit(1);
} else {
INFO_PRINT("Forcewake locked\n");
}
while(1) {
if (!is_alive()) {
INFO_PRINT("gpu reset? restarting daemon\n");
intel_register_access_fini();
ret = intel_register_access_init(intel_get_pci_device(), 1, -1);
ret = intel_register_access_init(igt_device_get_pci_device(fd), 1, -1);
if (ret)
INFO_PRINT("Reg access init fail\n");
}
sleep(1);
}
intel_register_access_fini();
close(fd);
INFO_PRINT("Forcewake unlock\n");
if (daemonized) {
......
......@@ -34,8 +34,9 @@
#include <sys/resource.h>
#include <sys/wait.h>
#include "drmtest.h"
#include "igt_device.h"
#include "intel_io.h"
#include "intel_chipset.h"
#include "intel_reg.h"
#define SAMPLES_PER_SEC 10000
......@@ -66,8 +67,11 @@ int main(int argc, char **argv)
struct timeval start, end;
static struct rusage rusage;
int status;
int fd;
intel_mmio_use_pci_bar(intel_get_pci_device());
fd = drm_open_driver(DRIVER_INTEL);
intel_mmio_use_pci_bar(igt_devi