Commit 1e5c8780 authored by Thomas Wood's avatar Thomas Wood

lib: remove /** from comments that are not API documentation

These comments are not gtk-doc comments, so replacing /** with /*
prevents any gtk-doc warnings.
Signed-off-by: default avatarThomas Wood <thomas.wood@intel.com>
parent 6d28f6a9
......@@ -324,7 +324,7 @@ enum i915_fs_channel {
(z##_CHANNEL_VAL << Z_CHANNEL_SHIFT) | \
(w##_CHANNEL_VAL << W_CHANNEL_SHIFT)
/**
/*
* Construct an operand description for using a register with no swizzling
*/
#define i915_fs_operand_reg(reg) \
......@@ -333,17 +333,17 @@ enum i915_fs_channel {
#define i915_fs_operand_reg_negate(reg) \
i915_fs_operand(reg, NEG_X, NEG_Y, NEG_Z, NEG_W)
/**
/*
* Returns an operand containing (0.0, 0.0, 0.0, 0.0).
*/
#define i915_fs_operand_zero() i915_fs_operand(FS_R0, ZERO, ZERO, ZERO, ZERO)
/**
/*
* Returns an unused operand
*/
#define i915_fs_operand_none() i915_fs_operand_zero()
/**
/*
* Returns an operand containing (1.0, 1.0, 1.0, 1.0).
*/
#define i915_fs_operand_one() i915_fs_operand(FS_R0, ONE, ONE, ONE, ONE)
......@@ -351,7 +351,7 @@ enum i915_fs_channel {
#define i915_get_hardware_channel_val(val, shift, negate) \
(((val & 0x7) << shift) | ((val & 0x8) ? negate : 0))
/**
/*
* Outputs a fragment shader command to declare a sampler or texture register.
*/
#define i915_fs_dcl(reg) \
......@@ -519,19 +519,19 @@ enum i915_fs_channel {
i915_fs_operand_none(), \
i915_fs_operand_none())
/** Add operand0 and operand1 and put the result in dest_reg */
/* Add operand0 and operand1 and put the result in dest_reg */
#define i915_fs_add(dest_reg, operand0, operand1) \
i915_fs_arith (ADD, dest_reg, \
operand0, operand1, \
i915_fs_operand_none())
/** Multiply operand0 and operand1 and put the result in dest_reg */
/* Multiply operand0 and operand1 and put the result in dest_reg */
#define i915_fs_mul(dest_reg, operand0, operand1) \
i915_fs_arith (MUL, dest_reg, \
operand0, operand1, \
i915_fs_operand_none())
/** Computes 1/sqrt(operand0.replicate_swizzle) puts the result in dest_reg */
/* Computes 1/sqrt(operand0.replicate_swizzle) puts the result in dest_reg */
#define i915_fs_rsq(dest_reg, dest_mask, operand0) \
do { \
if (dest_mask) { \
......@@ -547,13 +547,13 @@ enum i915_fs_channel {
} \
} while (0)
/** Puts the minimum of operand0 and operand1 in dest_reg */
/* Puts the minimum of operand0 and operand1 in dest_reg */
#define i915_fs_min(dest_reg, operand0, operand1) \
i915_fs_arith (MIN, dest_reg, \
operand0, operand1, \
i915_fs_operand_none())
/** Puts the maximum of operand0 and operand1 in dest_reg */
/* Puts the maximum of operand0 and operand1 in dest_reg */
#define i915_fs_max(dest_reg, operand0, operand1) \
i915_fs_arith (MAX, dest_reg, \
operand0, operand1, \
......@@ -562,7 +562,7 @@ enum i915_fs_channel {
#define i915_fs_cmp(dest_reg, operand0, operand1, operand2) \
i915_fs_arith (CMP, dest_reg, operand0, operand1, operand2)
/** Perform operand0 * operand1 + operand2 and put the result in dest_reg */
/* Perform operand0 * operand1 + operand2 and put the result in dest_reg */
#define i915_fs_mad(dest_reg, dest_mask, op0, op1, op2) \
do { \
if (dest_mask) { \
......@@ -581,7 +581,7 @@ enum i915_fs_channel {
} \
} while (0)
/**
/*
* Perform a 3-component dot-product of operand0 and operand1 and put the
* resulting scalar in the channels of dest_reg specified by the dest_mask.
*/
......@@ -597,7 +597,7 @@ enum i915_fs_channel {
} \
} while (0)
/**
/*
* Sets up local state for accumulating a fragment shader buffer.
*
* \param x maximum number of shader commands that may be used between
......
This diff is collapsed.
......@@ -286,7 +286,7 @@ gen8_fill_ps(struct intel_batchbuffer *batch,
return offset;
}
/**
/*
* gen7_fill_vertex_buffer_data populate vertex buffer with data.
*
* The vertex buffer consists of 3 vertices to construct a RECTLIST. The 4th
......@@ -327,7 +327,7 @@ gen7_fill_vertex_buffer_data(struct intel_batchbuffer *batch,
return offset;
}
/**
/*
* gen6_emit_vertex_elements - The vertex elements describe the contents of the
* vertex buffer. We pack the vertex buffer in a semi weird way, conforming to
* what gen6_rendercopy did. The most straightforward would be to store
......@@ -384,7 +384,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) {
GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT);
}
/**
/*
* gen7_emit_vertex_buffer emit the vertex buffers command
*
* @batch
......
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