Commit 1d8f3320 authored by Antonio Argenziano's avatar Antonio Argenziano

lib/i915: Move mmap IOCTLs wrappers into separate file

Move all mmap flavours and support function to separate file in i915
folder. This helps with moving i915 specific functions away from common
libraries.

v2:
	- Autotools still exists. (Petri)
	- Include gem_mman.h directly. (Chris)

v3:
	- Keep includes explicit. (Chris)
Signed-off-by: Antonio Argenziano's avatarAntonio Argenziano <antonio.argenziano@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Petri Latvala <petri.latvala@intel.com>
Reviewed-by: Chris Wilson's avatarChris Wilson <chris@chris-wilson.co.uk>
parent c33e271d
Pipeline #21430 passed with stages
in 9 minutes and 15 seconds
......@@ -45,6 +45,7 @@
#include "intel_chipset.h"
#include "intel_reg.h"
#include "igt_stats.h"
#include "i915/gem_mman.h"
#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
......
......@@ -40,6 +40,7 @@
#include "ioctl_wrappers.h"
#include "igt_debugfs.h"
#include "drmtest.h"
#include "i915/gem_mman.h"
#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
......
......@@ -43,6 +43,7 @@
#include "drmtest.h"
#include "igt_aux.h"
#include "igt_stats.h"
#include "i915/gem_mman.h"
#define OBJECT_SIZE (1<<23)
......
......@@ -53,6 +53,7 @@
#include "igt_rand.h"
#include "igt_perf.h"
#include "sw_sync.h"
#include "i915/gem_mman.h"
#include "ewma.h"
......
......@@ -11,6 +11,8 @@ lib_source_list = \
i915/gem_submission.h \
i915/gem_ring.h \
i915/gem_ring.c \
i915/gem_mman.c \
i915/gem_mman.h \
i915_3d.h \
i915_reg.h \
i915_pciids.h \
......
/*
* Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
*/
#include <stdbool.h>
#include <sys/ioctl.h>
#include <errno.h>
#include "igt_core.h"
#include "ioctl_wrappers.h"
#include "gem_mman.h"
#ifdef HAVE_VALGRIND
#include <valgrind/valgrind.h>
#include <valgrind/memcheck.h>
#define VG(x) x
#else
#define VG(x) do {} while (0)
#endif
/**
* __gem_mmap__gtt:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @size: size of the gem buffer
* @prot: memory protection bits as used by mmap()
*
* This functions wraps up procedure to establish a memory mapping through the
* GTT.
*
* Returns: A pointer to the created memory mapping, NULL on failure.
*/
void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot)
{
struct drm_i915_gem_mmap_gtt mmap_arg;
void *ptr;
memset(&mmap_arg, 0, sizeof(mmap_arg));
mmap_arg.handle = handle;
if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg))
return NULL;
ptr = mmap64(0, size, prot, MAP_SHARED, fd, mmap_arg.offset);
if (ptr == MAP_FAILED)
ptr = NULL;
else
errno = 0;
VG(VALGRIND_MAKE_MEM_DEFINED(ptr, size));
return ptr;
}
/**
* gem_mmap__gtt:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @size: size of the gem buffer
* @prot: memory protection bits as used by mmap()
*
* Like __gem_mmap__gtt() except we assert on failure.
*
* Returns: A pointer to the created memory mapping
*/
void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot)
{
void *ptr = __gem_mmap__gtt(fd, handle, size, prot);
igt_assert(ptr);
return ptr;
}
int gem_munmap(void *ptr, uint64_t size)
{
int ret = munmap(ptr, size);
if (ret == 0)
VG(VALGRIND_MAKE_MEM_NOACCESS(ptr, size));
return ret;
}
bool gem_mmap__has_wc(int fd)
{
static int has_wc = -1;
if (has_wc == -1) {
struct drm_i915_getparam gp;
int mmap_version = -1;
int gtt_version = -1;
has_wc = 0;
memset(&gp, 0, sizeof(gp));
gp.param = I915_PARAM_MMAP_GTT_VERSION;
gp.value = &gtt_version;
ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
memset(&gp, 0, sizeof(gp));
gp.param = I915_PARAM_MMAP_VERSION;
gp.value = &mmap_version;
ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
/* Do we have the new mmap_ioctl with DOMAIN_WC? */
if (mmap_version >= 1 && gtt_version >= 2) {
struct drm_i915_gem_mmap arg;
/* Does this device support wc-mmaps ? */
memset(&arg, 0, sizeof(arg));
arg.handle = gem_create(fd, 4096);
arg.offset = 0;
arg.size = 4096;
arg.flags = I915_MMAP_WC;
has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
gem_close(fd, arg.handle);
}
errno = 0;
}
return has_wc > 0;
}
/**
* __gem_mmap:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @offset: offset in the gem buffer of the mmap arena
* @size: size of the mmap arena
* @prot: memory protection bits as used by mmap()
* @flags: flags used to determine caching
*
* This functions wraps up procedure to establish a memory mapping through
* direct cpu access, bypassing the gpu (valid for wc == false). For wc == true
* it also bypass cpu caches completely and GTT system agent (i.e. there is no
* automatic tiling of the mmapping through the fence registers).
*
* Returns: A pointer to the created memory mapping, NULL on failure.
*/
static void
*__gem_mmap(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
{
struct drm_i915_gem_mmap arg;
memset(&arg, 0, sizeof(arg));
arg.handle = handle;
arg.offset = offset;
arg.size = size;
arg.flags = flags;
if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg))
return NULL;
VG(VALGRIND_MAKE_MEM_DEFINED(from_user_pointer(arg.addr_ptr), arg.size));
errno = 0;
return from_user_pointer(arg.addr_ptr);
}
/**
* __gem_mmap__wc:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @offset: offset in the gem buffer of the mmap arena
* @size: size of the mmap arena
* @prot: memory protection bits as used by mmap()
*
* This functions wraps up procedure to establish a memory mapping through
* direct cpu access, bypassing the gpu and cpu caches completely and also
* bypassing the GTT system agent (i.e. there is no automatic tiling of
* the mmapping through the fence registers).
*
* Returns: A pointer to the created memory mapping, NULL on failure.
*/
void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
{
return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
}
/**
* gem_mmap__wc:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @offset: offset in the gem buffer of the mmap arena
* @size: size of the mmap arena
* @prot: memory protection bits as used by mmap()
*
* Like __gem_mmap__wc() except we assert on failure.
*
* Returns: A pointer to the created memory mapping
*/
void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
{
void *ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
igt_assert(ptr);
return ptr;
}
/**
* __gem_mmap__cpu:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @offset: offset in the gem buffer of the mmap arena
* @size: size of the mmap arena
* @prot: memory protection bits as used by mmap()
*
* This functions wraps up procedure to establish a memory mapping through
* direct cpu access, bypassing the gpu completely.
*
* Returns: A pointer to the created memory mapping, NULL on failure.
*/
void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
{
return __gem_mmap(fd, handle, offset, size, prot, 0);
}
/**
* gem_mmap__cpu:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @offset: offset in the gem buffer of the mmap arena
* @size: size of the mmap arena
* @prot: memory protection bits as used by mmap()
*
* Like __gem_mmap__cpu() except we assert on failure.
*
* Returns: A pointer to the created memory mapping
*/
void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
{
void *ptr = __gem_mmap__cpu(fd, handle, offset, size, prot);
igt_assert(ptr);
return ptr;
}
/*
* Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
*/
#ifndef GEM_MMAN_H
#define GEM_MMAN_H
void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
bool gem_mmap__has_wc(int fd);
void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
#ifndef I915_GEM_DOMAIN_WC
#define I915_GEM_DOMAIN_WC 0x80
#endif
void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
int gem_munmap(void *ptr, uint64_t size);
/**
* gem_require_mmap_wc:
* @fd: open i915 drm file descriptor
*
* Feature test macro to query whether direct (i.e. cpu access path, bypassing
* the gtt) write-combine memory mappings are available. Automatically skips
* through igt_require() if not.
*/
#define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd))
#endif /* GEM_MMAN_H */
......@@ -52,5 +52,6 @@
#include "media_fill.h"
#include "media_spin.h"
#include "rendercopy.h"
#include "i915/gem_mman.h"
#endif /* IGT_H */
......@@ -33,6 +33,7 @@
#include "igt_fb.h"
#include "ioctl_wrappers.h"
#include "i830_reg.h"
#include "i915/gem_mman.h"
#ifndef PAGE_ALIGN
#ifndef PAGE_SIZE
......
......@@ -39,6 +39,7 @@
#include "ioctl_wrappers.h"
#include "sw_sync.h"
#include "igt_vgem.h"
#include "i915/gem_mman.h"
/**
* SECTION:igt_dummyload
......
......@@ -42,6 +42,7 @@
#include "ioctl_wrappers.h"
#include "intel_batchbuffer.h"
#include "intel_chipset.h"
#include "i915/gem_mman.h"
/**
* SECTION:igt_fb
......
......@@ -641,219 +641,6 @@ void gem_execbuf_wr(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
igt_assert_eq(__gem_execbuf_wr(fd, execbuf), 0);
}
/**
* __gem_mmap__gtt:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @size: size of the gem buffer
* @prot: memory protection bits as used by mmap()
*
* This functions wraps up procedure to establish a memory mapping through the
* GTT.
*
* Returns: A pointer to the created memory mapping, NULL on failure.
*/
void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot)
{
struct drm_i915_gem_mmap_gtt mmap_arg;
void *ptr;
memset(&mmap_arg, 0, sizeof(mmap_arg));
mmap_arg.handle = handle;
if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg))
return NULL;
ptr = mmap64(0, size, prot, MAP_SHARED, fd, mmap_arg.offset);
if (ptr == MAP_FAILED)
ptr = NULL;
else
errno = 0;
VG(VALGRIND_MAKE_MEM_DEFINED(ptr, size));
return ptr;
}
/**
* gem_mmap__gtt:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @size: size of the gem buffer
* @prot: memory protection bits as used by mmap()
*
* Like __gem_mmap__gtt() except we assert on failure.
*
* Returns: A pointer to the created memory mapping
*/
void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot)
{
void *ptr = __gem_mmap__gtt(fd, handle, size, prot);
igt_assert(ptr);
return ptr;
}
int gem_munmap(void *ptr, uint64_t size)
{
int ret = munmap(ptr, size);
if (ret == 0)
VG(VALGRIND_MAKE_MEM_NOACCESS(ptr, size));
return ret;
}
bool gem_mmap__has_wc(int fd)
{
static int has_wc = -1;
if (has_wc == -1) {
struct drm_i915_getparam gp;
int mmap_version = -1;
int gtt_version = -1;
has_wc = 0;
memset(&gp, 0, sizeof(gp));
gp.param = I915_PARAM_MMAP_GTT_VERSION;
gp.value = &gtt_version;
ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
memset(&gp, 0, sizeof(gp));
gp.param = I915_PARAM_MMAP_VERSION;
gp.value = &mmap_version;
ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
/* Do we have the new mmap_ioctl with DOMAIN_WC? */
if (mmap_version >= 1 && gtt_version >= 2) {
struct drm_i915_gem_mmap arg;
/* Does this device support wc-mmaps ? */
memset(&arg, 0, sizeof(arg));
arg.handle = gem_create(fd, 4096);
arg.offset = 0;
arg.size = 4096;
arg.flags = I915_MMAP_WC;
has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
gem_close(fd, arg.handle);
}
errno = 0;
}
return has_wc > 0;
}
/**
* __gem_mmap:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @offset: offset in the gem buffer of the mmap arena
* @size: size of the mmap arena
* @prot: memory protection bits as used by mmap()
* @flags: flags used to determine caching
*
* This functions wraps up procedure to establish a memory mapping through
* direct cpu access, bypassing the gpu (valid for wc == false). For wc == true
* it also bypass cpu caches completely and GTT system agent (i.e. there is no
* automatic tiling of the mmapping through the fence registers).
*
* Returns: A pointer to the created memory mapping, NULL on failure.
*/
static void
*__gem_mmap(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
{
struct drm_i915_gem_mmap arg;
memset(&arg, 0, sizeof(arg));
arg.handle = handle;
arg.offset = offset;
arg.size = size;
arg.flags = flags;
if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg))
return NULL;
VG(VALGRIND_MAKE_MEM_DEFINED(from_user_pointer(arg.addr_ptr), arg.size));
errno = 0;
return from_user_pointer(arg.addr_ptr);
}
/**
* __gem_mmap__wc:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @offset: offset in the gem buffer of the mmap arena
* @size: size of the mmap arena
* @prot: memory protection bits as used by mmap()
*
* This functions wraps up procedure to establish a memory mapping through
* direct cpu access, bypassing the gpu and cpu caches completely and also
* bypassing the GTT system agent (i.e. there is no automatic tiling of
* the mmapping through the fence registers).
*
* Returns: A pointer to the created memory mapping, NULL on failure.
*/
void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
{
return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
}
/**
* gem_mmap__wc:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @offset: offset in the gem buffer of the mmap arena
* @size: size of the mmap arena
* @prot: memory protection bits as used by mmap()
*
* Like __gem_mmap__wc() except we assert on failure.
*
* Returns: A pointer to the created memory mapping
*/
void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
{
void *ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
igt_assert(ptr);
return ptr;
}
/**
* __gem_mmap__cpu:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @offset: offset in the gem buffer of the mmap arena
* @size: size of the mmap arena
* @prot: memory protection bits as used by mmap()
*
* This functions wraps up procedure to establish a memory mapping through
* direct cpu access, bypassing the gpu completely.
*
* Returns: A pointer to the created memory mapping, NULL on failure.
*/
void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
{
return __gem_mmap(fd, handle, offset, size, prot, 0);
}
/**
* gem_mmap__cpu:
* @fd: open i915 drm file descriptor
* @handle: gem buffer object handle
* @offset: offset in the gem buffer of the mmap arena
* @size: size of the mmap arena
* @prot: memory protection bits as used by mmap()
*
* Like __gem_mmap__cpu() except we assert on failure.
*
* Returns: A pointer to the created memory mapping
*/
void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
{
void *ptr = __gem_mmap__cpu(fd, handle, offset, size, prot);
igt_assert(ptr);
return ptr;
}
/**
* gem_madvise:
* @fd: open i915 drm file descriptor
......
......@@ -84,22 +84,10 @@ int __gem_execbuf_wr(int fd, struct drm_i915_gem_execbuffer2 *execbuf);
void gem_execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf);
int __gem_execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf);
void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
bool gem_mmap__has_wc(int fd);
void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
#ifndef I915_GEM_DOMAIN_WC
#define I915_GEM_DOMAIN_WC 0x80
#endif
void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
int gem_munmap(void *ptr, uint64_t size);
/**
* gem_require_stolen_support:
* @fd: open i915 drm file descriptor
......@@ -111,16 +99,6 @@ int gem_munmap(void *ptr, uint64_t size);
igt_require(gem_create__has_stolen_support(fd) && \
(gem_total_stolen_size(fd) > 0))
/**
* gem_require_mmap_wc:
* @fd: open i915 drm file descriptor
*
* Feature test macro to query whether direct (i.e. cpu access path, bypassing
* the gtt) write-combine memory mappings are available. Automatically skips
* through igt_require() if not.
*/
#define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd))
int gem_madvise(int fd, uint32_t handle, int state);
#define LOCAL_I915_GEM_USERPTR 0x33
......
......@@ -4,6 +4,7 @@ lib_sources = [
'i915/gem_scheduler.c',
'i915/gem_submission.c',
'i915/gem_ring.c',
'i915/gem_mman.c',
'igt_color_encoding.c',
'igt_debugfs.c',
'igt_device.c',
......
......@@ -56,6 +56,7 @@
#include "drmtest.h"
#include "drm.h"
#include "i915_drm.h"
#include "i915/gem_mman.h"
IGT_TEST_DESCRIPTION("This test verifies the exetended gem_create ioctl,"
" that includes allocation of obj from stolen region");
......
......@@ -45,6 +45,7 @@
#include "drmtest.h"
#include "igt_debugfs.h"
#include "ioctl_wrappers.h"
#include "i915/gem_mman.h"
#define BO_SIZE (16*1024)
......
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