• José Roberto de Souza's avatar
    test: Add PSR2 selective update tests · eea5cf40
    José Roberto de Souza authored
    This tests checks if hardware is able to do selective update when
    screen changes.
    PSR2 don't trigger interruptions and the 'PSR2 SU status' register
    is not kept loaded all the times, so it is necessary keep polling
    PSR status debugfs until those values are loaded.
    
    Also from DEEP_SLEEP state HW will not do a seletive update, as
    most of the memory/context is lost in deep sleep state hardware will
    need to exit PSR mode then wait a configured number of frames to
    activate PSR again to then start doing seletive updates, that is why
    just one screen change is not enough to pass this tests.
    
    When a selective update happens and the values are loaded and read
    from debugfs it is compared with the expected value of seletive
    update blocks, if matches the polling is stopped and the test passed
    otherwise it will wait until it reachs a maximum number o screen
    changes to fail the test.
    
    v2: Using new SU blocks debugfs output
    
    v3:
    - removed the timerfd to fail the test, now failing based in a
    maximum number of screen changes
    - removing thread to read debugfs, read from main thread is enough
    - improved commit message
    
    v4:
    - getting cairo context for frontbuffer test in prepare()
    - droppoing poll(), using blocking timerfd instead
    
    v5:
    - Doing a modeset before trying to enable PSR2
    
    v6:
    - doing atomic commits to fix(legacy commit is taking more time in
    recent kernels causing us to miss the SU when reading debugfs) and
    speedup test
    - fixed code to skip test when PSR2 is not possile
    Reviewed-by: Dhinakaran Pandiyan's avatarDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
    Tested-by: Dhinakaran Pandiyan's avatarDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
    Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
    Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
    Signed-off-by: José Roberto de Souza's avatarJosé Roberto de Souza <jose.souza@intel.com>
    eea5cf40
igt_psr.c 5.18 KB