Commit b3880d3a authored by Daniel Vetter's avatar Daniel Vetter

tests: roll out igt_fixture

Also sprinkle igt_assert and igt_require over the setup code to clean
up code while at it. To avoid gcc getting upset about unitialized
variables just move them out of main as global data (where they always
get initialized to 0) - gcc can't see through our igt_fixture and
igt_subtest maze properly.
Signed-off-by: Daniel Vetter's avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent c3dd8a8c
...@@ -75,13 +75,14 @@ test_create_fd_close(int fd) ...@@ -75,13 +75,14 @@ test_create_fd_close(int fd)
close(fd); close(fd);
} }
int fd;
int main(int argc, char **argv) int main(int argc, char **argv)
{ {
int fd;
igt_subtest_init(argc, argv); igt_subtest_init(argc, argv);
fd = drm_open_any(); igt_fixture
fd = drm_open_any();
igt_subtest("bad-close") igt_subtest("bad-close")
test_bad_close(fd); test_bad_close(fd);
......
...@@ -113,32 +113,34 @@ int main(int argc, char **argv) ...@@ -113,32 +113,34 @@ int main(int argc, char **argv)
igt_subtest_init(argc, argv); igt_subtest_init(argc, argv);
igt_skip_on_simulation(); igt_skip_on_simulation();
srandom(0xdeadbeef); igt_fixture {
srandom(0xdeadbeef);
fd = drm_open_any(); fd = drm_open_any();
gem_require_caching(fd); gem_require_caching(fd);
devid = intel_get_drm_devid(fd); devid = intel_get_drm_devid(fd);
if (IS_GEN2(devid)) /* chipset only handles cached -> uncached */ if (IS_GEN2(devid)) /* chipset only handles cached -> uncached */
flags &= ~TEST_READ; flags &= ~TEST_READ;
if (IS_BROADWATER(devid) || IS_CRESTLINE(devid)) { if (IS_BROADWATER(devid) || IS_CRESTLINE(devid)) {
/* chipset is completely fubar */ /* chipset is completely fubar */
printf("coherency broken on i965g/gm\n"); printf("coherency broken on i965g/gm\n");
flags = 0; flags = 0;
} }
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
batch = intel_batchbuffer_alloc(bufmgr, devid); batch = intel_batchbuffer_alloc(bufmgr, devid);
/* overallocate the buffers we're actually using because */ /* overallocate the buffers we're actually using because */
scratch_bo = drm_intel_bo_alloc(bufmgr, "scratch bo", BO_SIZE, 4096); scratch_bo = drm_intel_bo_alloc(bufmgr, "scratch bo", BO_SIZE, 4096);
gem_set_caching(fd, scratch_bo->handle, 1); gem_set_caching(fd, scratch_bo->handle, 1);
staging_bo = drm_intel_bo_alloc(bufmgr, "staging bo", BO_SIZE, 4096); staging_bo = drm_intel_bo_alloc(bufmgr, "staging bo", BO_SIZE, 4096);
igt_init_aperture_trashers(bufmgr); igt_init_aperture_trashers(bufmgr);
mappable_gtt_limit = gem_mappable_aperture_size(); mappable_gtt_limit = gem_mappable_aperture_size();
}
igt_subtest("reads") { igt_subtest("reads") {
if (!(flags & TEST_READ)) if (!(flags & TEST_READ))
...@@ -295,10 +297,12 @@ int main(int argc, char **argv) ...@@ -295,10 +297,12 @@ int main(int argc, char **argv)
} }
} }
igt_cleanup_aperture_trashers(); igt_fixture {
drm_intel_bufmgr_destroy(bufmgr); igt_cleanup_aperture_trashers();
drm_intel_bufmgr_destroy(bufmgr);
close(fd); close(fd);
}
igt_exit(); igt_exit();
} }
...@@ -145,16 +145,17 @@ static void run_on_ring(int fd, unsigned ring_id, const char *ring_name) ...@@ -145,16 +145,17 @@ static void run_on_ring(int fd, unsigned ring_id, const char *ring_name)
} }
int fd;
int main(int argc, char **argv) int main(int argc, char **argv)
{ {
int fd;
igt_subtest_init(argc, argv); igt_subtest_init(argc, argv);
igt_skip_on_simulation(); igt_skip_on_simulation();
fd = drm_open_any(); igt_fixture {
fd = drm_open_any();
if (!igt_only_list_subtests()) {
/* This test is very sensitive to residual gtt_mm noise from previous /* This test is very sensitive to residual gtt_mm noise from previous
* tests. Try to quiet thing down first. */ * tests. Try to quiet thing down first. */
gem_quiescent_gpu(fd); gem_quiescent_gpu(fd);
...@@ -173,7 +174,8 @@ int main(int argc, char **argv) ...@@ -173,7 +174,8 @@ int main(int argc, char **argv)
igt_subtest("vebox") igt_subtest("vebox")
run_on_ring(fd, LOCAL_I915_EXEC_VEBOX, "vebox"); run_on_ring(fd, LOCAL_I915_EXEC_VEBOX, "vebox");
close(fd); igt_fixture
close(fd);
igt_exit(); igt_exit();
} }
...@@ -103,22 +103,25 @@ static int exec(int fd, uint32_t handle, int ring, int ctx_id) ...@@ -103,22 +103,25 @@ static int exec(int fd, uint32_t handle, int ring, int ctx_id)
return ret; return ret;
} }
uint32_t handle;
uint32_t batch[2] = {MI_BATCH_BUFFER_END};
uint32_t ctx_id;
int fd;
int main(int argc, char *argv[]) int main(int argc, char *argv[])
{ {
uint32_t handle;
uint32_t batch[2] = {MI_BATCH_BUFFER_END};
uint32_t ctx_id;
int fd;
igt_skip_on_simulation(); igt_skip_on_simulation();
igt_subtest_init(argc, argv); igt_subtest_init(argc, argv);
fd = drm_open_any(); igt_fixture {
fd = drm_open_any();
ctx_id = context_create(fd); ctx_id = context_create(fd);
handle = gem_create(fd, 4096);
gem_write(fd, handle, 0, batch, sizeof(batch));
}
handle = gem_create(fd, 4096);
gem_write(fd, handle, 0, batch, sizeof(batch));
igt_subtest("render") igt_subtest("render")
igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id) == 0); igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id) == 0);
igt_subtest("bsd") igt_subtest("bsd")
......
...@@ -123,40 +123,32 @@ dummy_reloc_loop_random_ring(int num_rings) ...@@ -123,40 +123,32 @@ dummy_reloc_loop_random_ring(int num_rings)
} }
} }
int fd;
int devid;
int num_rings;
int main(int argc, char **argv) int main(int argc, char **argv)
{ {
int fd;
int devid;
int num_rings;
igt_subtest_init(argc, argv); igt_subtest_init(argc, argv);
igt_skip_on_simulation(); igt_skip_on_simulation();
fd = drm_open_any(); igt_fixture {
devid = intel_get_drm_devid(fd); fd = drm_open_any();
num_rings = gem_get_num_rings(fd); devid = intel_get_drm_devid(fd);
if (!HAS_BLT_RING(devid)) { num_rings = gem_get_num_rings(fd);
fprintf(stderr, "not (yet) implemented for pre-snb\n"); /* Not yet implemented on pre-snb. */
igt_skip(); igt_require(!HAS_BLT_RING(devid));
}
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
if (!bufmgr) { igt_assert(bufmgr);
fprintf(stderr, "failed to init libdrm\n"); drm_intel_bufmgr_gem_enable_reuse(bufmgr);
igt_fail(-1);
}
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
batch = intel_batchbuffer_alloc(bufmgr, devid); batch = intel_batchbuffer_alloc(bufmgr, devid);
if (!batch) { igt_assert(batch);
fprintf(stderr, "failed to create batch buffer\n");
igt_fail(-1);
}
target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096);
if (!target_buffer) { igt_assert(target_buffer);
fprintf(stderr, "failed to alloc target buffer\n");
igt_fail(-1);
} }
igt_subtest("render") { igt_subtest("render") {
...@@ -198,11 +190,13 @@ int main(int argc, char **argv) ...@@ -198,11 +190,13 @@ int main(int argc, char **argv)
} }
} }
drm_intel_bo_unreference(target_buffer); igt_fixture {
intel_batchbuffer_free(batch); drm_intel_bo_unreference(target_buffer);
drm_intel_bufmgr_destroy(bufmgr); intel_batchbuffer_free(batch);
drm_intel_bufmgr_destroy(bufmgr);
close(fd); close(fd);
}
igt_exit(); igt_exit();
} }
...@@ -150,41 +150,35 @@ static void multi_write_domain(int fd) ...@@ -150,41 +150,35 @@ static void multi_write_domain(int fd)
} }
} }
int fd;
drm_intel_bo *tmp;
int main(int argc, char **argv) int main(int argc, char **argv)
{ {
int fd, ret;
drm_intel_bo *tmp;
igt_subtest_init(argc, argv); igt_subtest_init(argc, argv);
fd = drm_open_any(); igt_fixture {
fd = drm_open_any();
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr); drm_intel_bufmgr_gem_enable_reuse(bufmgr);
batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
tmp = drm_intel_bo_alloc(bufmgr, "tmp", 128 * 128, 4096); tmp = drm_intel_bo_alloc(bufmgr, "tmp", 128 * 128, 4096);
}
igt_subtest("cpu-domain") { igt_subtest("cpu-domain") {
BEGIN_BATCH(2); BEGIN_BATCH(2);
OUT_BATCH(0); OUT_BATCH(0);
OUT_RELOC(tmp, I915_GEM_DOMAIN_CPU, 0, 0); OUT_RELOC(tmp, I915_GEM_DOMAIN_CPU, 0, 0);
ADVANCE_BATCH(); ADVANCE_BATCH();
ret = run_batch(); igt_assert(run_batch() == -EINVAL);
if (ret != -EINVAL) {
fprintf(stderr, "(cpu, 0) reloc not rejected\n");
igt_fail(1);
}
BEGIN_BATCH(2); BEGIN_BATCH(2);
OUT_BATCH(0); OUT_BATCH(0);
OUT_RELOC(tmp, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU, 0); OUT_RELOC(tmp, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU, 0);
ADVANCE_BATCH(); ADVANCE_BATCH();
ret = run_batch(); igt_assert(run_batch() == -EINVAL);
if (ret != -EINVAL) {
fprintf(stderr, "(cpu, cpu) reloc not rejected\n");
igt_fail(1);
}
} }
igt_subtest("gtt-domain") { igt_subtest("gtt-domain") {
...@@ -192,21 +186,13 @@ int main(int argc, char **argv) ...@@ -192,21 +186,13 @@ int main(int argc, char **argv)
OUT_BATCH(0); OUT_BATCH(0);
OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT, 0, 0); OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT, 0, 0);
ADVANCE_BATCH(); ADVANCE_BATCH();
ret = run_batch(); igt_assert(run_batch() == -EINVAL);
if (ret != -EINVAL) {
fprintf(stderr, "(gtt, 0) reloc not rejected\n");
igt_fail(1);
}
BEGIN_BATCH(2); BEGIN_BATCH(2);
OUT_BATCH(0); OUT_BATCH(0);
OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT, 0); OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT, 0);
ADVANCE_BATCH(); ADVANCE_BATCH();
ret = run_batch(); igt_assert(run_batch() == -EINVAL);
if (ret != -EINVAL) {
fprintf(stderr, "(gtt, gtt) reloc not rejected\n");
igt_fail(1);
}
} }
#if 0 /* kernel checks have been eased, doesn't reject conflicting write domains #if 0 /* kernel checks have been eased, doesn't reject conflicting write domains
...@@ -220,11 +206,7 @@ int main(int argc, char **argv) ...@@ -220,11 +206,7 @@ int main(int argc, char **argv)
OUT_RELOC(tmp, I915_GEM_DOMAIN_INSTRUCTION, OUT_RELOC(tmp, I915_GEM_DOMAIN_INSTRUCTION,
I915_GEM_DOMAIN_INSTRUCTION, 0); I915_GEM_DOMAIN_INSTRUCTION, 0);
ADVANCE_BATCH(); ADVANCE_BATCH();
ret = run_batch(); igt_assert(run_batch() == -EINVAL);
if (ret != -EINVAL) {
fprintf(stderr, "conflicting write domains not rejected\n");
igt_fail(1);
}
} }
#endif #endif
...@@ -237,28 +219,22 @@ int main(int argc, char **argv) ...@@ -237,28 +219,22 @@ int main(int argc, char **argv)
OUT_RELOC(tmp, ~(I915_GEM_GPU_DOMAINS | I915_GEM_DOMAIN_GTT | I915_GEM_DOMAIN_CPU), OUT_RELOC(tmp, ~(I915_GEM_GPU_DOMAINS | I915_GEM_DOMAIN_GTT | I915_GEM_DOMAIN_CPU),
0, 0); 0, 0);
ADVANCE_BATCH(); ADVANCE_BATCH();
ret = run_batch(); igt_assert(run_batch() == -EINVAL);
if (ret != -EINVAL) {
fprintf(stderr, "invalid gpu read domains not rejected\n");
igt_fail(1);
}
BEGIN_BATCH(2); BEGIN_BATCH(2);
OUT_BATCH(0); OUT_BATCH(0);
OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT << 1, OUT_RELOC(tmp, I915_GEM_DOMAIN_GTT << 1,
I915_GEM_DOMAIN_GTT << 1, 0); I915_GEM_DOMAIN_GTT << 1, 0);
ADVANCE_BATCH(); ADVANCE_BATCH();
ret = run_batch(); igt_assert(run_batch() == -EINVAL);
if (ret != -EINVAL) {
fprintf(stderr, "invalid gpu domain not rejected\n");
igt_fail(1);
}
} }
intel_batchbuffer_free(batch); igt_fixture {
drm_intel_bufmgr_destroy(bufmgr); intel_batchbuffer_free(batch);
drm_intel_bufmgr_destroy(bufmgr);
close(fd); close(fd);
}
igt_exit(); igt_exit();
} }
...@@ -107,18 +107,20 @@ static void loop(int fd, uint32_t handle, unsigned ring_id, const char *ring_nam ...@@ -107,18 +107,20 @@ static void loop(int fd, uint32_t handle, unsigned ring_id, const char *ring_nam
} }
} }
uint32_t batch[2] = {MI_BATCH_BUFFER_END};
uint32_t handle;
int fd;
int main(int argc, char **argv) int main(int argc, char **argv)
{ {
uint32_t batch[2] = {MI_BATCH_BUFFER_END};
uint32_t handle;
int fd;
igt_subtest_init(argc, argv); igt_subtest_init(argc, argv);
fd = drm_open_any(); igt_fixture {
fd = drm_open_any();
handle = gem_create(fd, 4096); handle = gem_create(fd, 4096);
gem_write(fd, handle, 0, batch, sizeof(batch)); gem_write(fd, handle, 0, batch, sizeof(batch));
}
igt_subtest("render") igt_subtest("render")
loop(fd, handle, I915_EXEC_RENDER, "render"); loop(fd, handle, I915_EXEC_RENDER, "render");
...@@ -132,9 +134,11 @@ int main(int argc, char **argv) ...@@ -132,9 +134,11 @@ int main(int argc, char **argv)
igt_subtest("vebox") igt_subtest("vebox")
loop(fd, handle, LOCAL_I915_EXEC_VEBOX, "vebox"); loop(fd, handle, LOCAL_I915_EXEC_VEBOX, "vebox");
gem_close(fd, handle); igt_fixture {
gem_close(fd, handle);
close(fd); close(fd);
}
igt_exit(); igt_exit();
} }
...@@ -149,13 +149,14 @@ test_flink_lifetime(int fd) ...@@ -149,13 +149,14 @@ test_flink_lifetime(int fd)
igt_assert(open_struct.handle != 0); igt_assert(open_struct.handle != 0);
} }
int fd;
int main(int argc, char **argv) int main(int argc, char **argv)
{ {
int fd;
igt_subtest_init(argc, argv); igt_subtest_init(argc, argv);
fd = drm_open_any(); igt_fixture
fd = drm_open_any();
igt_subtest("basic") igt_subtest("basic")
test_flink(fd); test_flink(fd);
......
...@@ -237,15 +237,15 @@ static void run_test(int fd, int count) ...@@ -237,15 +237,15 @@ static void run_test(int fd, int count)
int main(int argc, char **argv) int main(int argc, char **argv)
{ {
int fd, count = 0; int fd = 0, count = 0;
igt_skip_on_simulation(); igt_skip_on_simulation();
igt_subtest_init(argc, argv); igt_subtest_init(argc, argv);
fd = drm_open_any(); igt_fixture {
fd = drm_open_any();
if (!igt_only_list_subtests()) {
if (argc > 1) if (argc > 1)
count = atoi(argv[1]); count = atoi(argv[1]);
if (count == 0) if (count == 0)
......
...@@ -152,16 +152,17 @@ run_without_prefault(int fd, ...@@ -152,16 +152,17 @@ run_without_prefault(int fd,
igt_enable_prefault(); igt_enable_prefault();
} }
int fd;
int main(int argc, char **argv) int main(int argc, char **argv)
{ {
int fd;
if (igt_run_in_simulation()) if (igt_run_in_simulation())
OBJECT_SIZE = 1 * 1024 * 1024; OBJECT_SIZE = 1 * 1024 * 1024;
igt_subtest_init(argc, argv); igt_subtest_init(argc, argv);
fd = drm_open_any(); igt_fixture
fd = drm_open_any();
igt_subtest("copy") igt_subtest("copy")
test_copy(fd); test_copy(fd);
...@@ -178,7 +179,8 @@ int main(int argc, char **argv) ...@@ -178,7 +179,8 @@ int main(int argc, char **argv)
igt_subtest("write-gtt-no-prefault") igt_subtest("write-gtt-no-prefault")
run_without_prefault(fd, test_write_gtt); run_without_prefault(fd, test_write_gtt);
close(fd); igt_fixture
close(fd);
igt_exit(); igt_exit();
} }
...@@ -254,8 +254,10 @@ static void test_partial_read_writes(void) ...@@ -254,8 +254,10 @@ static void test_partial_read_writes(void)
static void do_tests(int cache_level, const char *suffix) static void do_tests(int cache_level, const char *suffix)
{ {
if (cache_level != -1) igt_fixture {
gem_set_caching(fd, scratch_bo->handle, cache_level); if (cache_level != -1)
gem_set_caching(fd, scratch_bo->handle, cache_level);
}
igt_subtest_f("reads%s", suffix) igt_subtest_f("reads%s", suffix)
test_partial_reads(); test_partial_reads();
...@@ -274,19 +276,21 @@ int main(int argc, char **argv) ...@@ -274,19 +276,21 @@ int main(int argc, char **argv)
igt_subtest_init(argc, argv); igt_subtest_init(argc, argv);
igt_skip_on_simulation(); igt_skip_on_simulation();
fd = drm_open_any(); igt_fixture {
fd = drm_open_any();
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
//drm_intel_bufmgr_gem_enable_reuse(bufmgr); //drm_intel_bufmgr_gem_enable_reuse(bufmgr);
devid = intel_get_drm_devid(fd);