Commit 41e2dcb9 authored by Zbigniew Kempczyński's avatar Zbigniew Kempczyński Committed by Chris Wilson

lib/bufops: add surface array to cover ccs pgtable

Rendercopy for gen12+ requires additional aux pgtable. Alter bufops
and tests to use surface[] and ccs[] instead aux. This step is
required to properly rewrite handling aux pgtable to use with
intel_bb.
Signed-off-by: Zbigniew Kempczyński's avatarZbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson's avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson's avatarChris Wilson <chris@chris-wilson.co.uk>
parent a4d83701
Pipeline #172360 passed with stages
in 13 minutes and 47 seconds
......@@ -116,7 +116,7 @@ gen7_fill_surface_state(struct intel_bb *ibb,
ss->ss2.height = intel_buf_height(buf) - 1;
ss->ss2.width = intel_buf_width(buf) - 1;
ss->ss3.pitch = buf->stride - 1;
ss->ss3.pitch = buf->surface[0].stride - 1;
ss->ss7.shader_chanel_select_r = 4;
ss->ss7.shader_chanel_select_g = 5;
......@@ -168,7 +168,7 @@ gen8_fill_surface_state(struct intel_bb *ibb,
ss->ss2.height = intel_buf_height(buf) - 1;
ss->ss2.width = intel_buf_width(buf) - 1;
ss->ss3.pitch = buf->stride - 1;
ss->ss3.pitch = buf->surface[0].stride - 1;
ss->ss7.shader_chanel_select_r = 4;
ss->ss7.shader_chanel_select_g = 5;
......
......@@ -2030,8 +2030,8 @@ void intel_bb_emit_blt_copy(struct intel_bb *ibb,
igt_assert(bpp*(src_x1 + width) <= 8*src_pitch);
igt_assert(bpp*(dst_x1 + width) <= 8*dst_pitch);
igt_assert(src_pitch * (src_y1 + height) <= src->size);
igt_assert(dst_pitch * (dst_y1 + height) <= dst->size);
igt_assert(src_pitch * (src_y1 + height) <= src->surface[0].size);
igt_assert(dst_pitch * (dst_y1 + height) <= dst->surface[0].size);
if (gen >= 4 && src->tiling != I915_TILING_NONE) {
src_pitch /= 4;
......
This diff is collapsed.
......@@ -3,6 +3,7 @@
#include <stdint.h>
#include "igt_aux.h"
#include "intel_batchbuffer.h"
struct buf_ops;
......@@ -11,16 +12,19 @@ struct buf_ops;
struct intel_buf {
struct buf_ops *bops;
uint32_t handle;
uint32_t stride;
uint32_t tiling;
uint32_t bpp;
uint32_t size;
uint32_t compression;
uint32_t swizzle_mode;
struct {
uint32_t offset;
uint32_t stride;
} aux;
uint32_t size;
} surface[2];
struct {
uint32_t offset;
uint32_t stride;
} ccs[2];
struct {
uint32_t offset;
} cc;
......@@ -33,18 +37,23 @@ struct intel_buf {
char name[INTEL_BUF_NAME_MAXSIZE + 1];
};
static inline bool intel_buf_compressed(const struct intel_buf *buf)
{
return buf->compression != I915_COMPRESSION_NONE;
}
static inline unsigned int intel_buf_width(const struct intel_buf *buf)
{
return buf->stride / (buf->bpp / 8);
return buf->surface[0].stride / (buf->bpp / 8);
}
static inline unsigned int intel_buf_height(const struct intel_buf *buf)
{
return buf->size / buf->stride;
return buf->surface[0].size / buf->surface[0].stride;
}
static inline unsigned int
intel_buf_aux_width(int gen, const struct intel_buf *buf)
intel_buf_ccs_width(int gen, const struct intel_buf *buf)
{
/*
* GEN12+: The AUX CCS unit size is 64 bytes mapping 4 main surface
......@@ -58,7 +67,7 @@ intel_buf_aux_width(int gen, const struct intel_buf *buf)
}
static inline unsigned int
intel_buf_aux_height(int gen, const struct intel_buf *buf)
intel_buf_ccs_height(int gen, const struct intel_buf *buf)
{
/*
* GEN12+: The AUX CCS unit size is 64 bytes mapping 4 main surface
......
......@@ -62,13 +62,13 @@ struct rendercopy_bufmgr {
static void __igt_buf_to_intel_buf(struct igt_buf *buf, struct intel_buf *ibuf)
{
ibuf->handle = buf->bo->handle;
ibuf->stride = buf->surface[0].stride;
ibuf->surface[0].stride = buf->surface[0].stride;
ibuf->tiling = buf->tiling;
ibuf->bpp = buf->bpp;
ibuf->size = buf->surface[0].size;
ibuf->surface[0].size = buf->surface[0].size;
ibuf->compression = buf->compression;
ibuf->aux.offset = buf->ccs[0].offset;
ibuf->aux.stride = buf->ccs[0].stride;
ibuf->ccs[0].offset = buf->ccs[0].offset;
ibuf->ccs[0].stride = buf->ccs[0].stride;
}
void igt_buf_to_linear(struct rendercopy_bufmgr *bmgr, struct igt_buf *buf,
......@@ -166,6 +166,6 @@ void igt_buf_init(struct rendercopy_bufmgr *bmgr, struct igt_buf *buf,
width, height, bpp, 0,
tiling, compression);
buf->ccs[0].offset = ibuf.aux.offset;
buf->ccs[0].stride = ibuf.aux.stride;
buf->ccs[0].offset = ibuf.ccs[0].offset;
buf->ccs[0].stride = ibuf.ccs[0].stride;
}
......@@ -74,13 +74,13 @@ static void fill_buf(struct intel_buf *buf, uint8_t color)
int i915 = buf_ops_get_fd(buf->bops);
int i;
ptr = gem_mmap__device_coherent(i915, buf->handle, 0, buf->size,
PROT_WRITE);
ptr = gem_mmap__device_coherent(i915, buf->handle, 0,
buf->surface[0].size, PROT_WRITE);
for (i = 0; i < buf->size; i++)
for (i = 0; i < buf->surface[0].size; i++)
ptr[i] = color;
munmap(ptr, buf->size);
munmap(ptr, buf->surface[0].size);
}
static void check_buf(struct intel_buf *buf, uint8_t color)
......@@ -89,13 +89,13 @@ static void check_buf(struct intel_buf *buf, uint8_t color)
int i915 = buf_ops_get_fd(buf->bops);
int i;
ptr = gem_mmap__device_coherent(i915, buf->handle, 0, buf->size,
PROT_READ);
ptr = gem_mmap__device_coherent(i915, buf->handle, 0,
buf->surface[0].size, PROT_READ);
for (i = 0; i < buf->size; i++)
for (i = 0; i < buf->surface[0].size; i++)
igt_assert(ptr[i] == color);
munmap(ptr, buf->size);
munmap(ptr, buf->surface[0].size);
}
......@@ -118,12 +118,12 @@ static void print_buf(struct intel_buf *buf, const char *name)
uint8_t *ptr;
int i915 = buf_ops_get_fd(buf->bops);
ptr = gem_mmap__device_coherent(i915, buf->handle, 0, buf->size,
PROT_READ);
ptr = gem_mmap__device_coherent(i915, buf->handle, 0,
buf->surface[0].size, PROT_READ);
igt_debug("[%s] Buf handle: %d, size: %d, v: 0x%02x, presumed_addr: %p\n",
name, buf->handle, buf->size, ptr[0],
name, buf->handle, buf->surface[0].size, ptr[0],
from_user_pointer(buf->addr.offset));
munmap(ptr, buf->size);
munmap(ptr, buf->surface[0].size);
}
static void simple_bb(struct buf_ops *bops, bool use_context)
......@@ -194,7 +194,7 @@ static void __emit_blit(struct intel_bb *ibb,
XY_SRC_COPY_BLT_WRITE_ALPHA |
XY_SRC_COPY_BLT_WRITE_RGB |
(6 + 2 * has_64b_reloc));
intel_bb_out(ibb, 3 << 24 | 0xcc << 16 | dst->stride);
intel_bb_out(ibb, 3 << 24 | 0xcc << 16 | dst->surface[0].stride);
intel_bb_out(ibb, 0);
intel_bb_out(ibb, intel_buf_height(dst) << 16 | intel_buf_width(dst));
intel_bb_emit_reloc_fenced(ibb, dst->handle,
......@@ -202,7 +202,7 @@ static void __emit_blit(struct intel_bb *ibb,
I915_GEM_DOMAIN_RENDER,
0, dst->addr.offset);
intel_bb_out(ibb, 0);
intel_bb_out(ibb, src->stride);
intel_bb_out(ibb, src->surface[0].stride);
intel_bb_emit_reloc_fenced(ibb, src->handle,
I915_GEM_DOMAIN_RENDER, 0,
0, src->addr.offset);
......@@ -351,13 +351,13 @@ static void scratch_buf_draw_pattern(struct buf_ops *bops,
cairo_t *cr;
void *linear;
linear = alloc_aligned(buf->size);
linear = alloc_aligned(buf->surface[0].size);
surface = cairo_image_surface_create_for_data(linear,
CAIRO_FORMAT_RGB24,
intel_buf_width(buf),
intel_buf_height(buf),
buf->stride);
buf->surface[0].stride);
cr = cairo_create(surface);
......@@ -435,21 +435,21 @@ static int compare_bufs(struct intel_buf *buf1, struct intel_buf *buf2,
void *ptr1, *ptr2;
int fd1, fd2, ret;
igt_assert(buf1->size == buf2->size);
igt_assert(buf1->surface[0].size == buf2->surface[0].size);
fd1 = buf_ops_get_fd(buf1->bops);
fd2 = buf_ops_get_fd(buf2->bops);
ptr1 = gem_mmap__device_coherent(fd1, buf1->handle, 0, buf1->size,
PROT_READ);
ptr2 = gem_mmap__device_coherent(fd2, buf2->handle, 0, buf2->size,
PROT_READ);
ret = memcmp(ptr1, ptr2, buf1->size);
ptr1 = gem_mmap__device_coherent(fd1, buf1->handle, 0,
buf1->surface[0].size, PROT_READ);
ptr2 = gem_mmap__device_coherent(fd2, buf2->handle, 0,
buf2->surface[0].size, PROT_READ);
ret = memcmp(ptr1, ptr2, buf1->surface[0].size);
if (detail_compare)
ret = compare_detail(ptr1, ptr2, buf1->size);
ret = compare_detail(ptr1, ptr2, buf1->surface[0].size);
munmap(ptr1, buf1->size);
munmap(ptr2, buf2->size);
munmap(ptr1, buf1->surface[0].size);
munmap(ptr2, buf2->surface[0].size);
return ret;
}
......@@ -484,15 +484,15 @@ static int __do_intel_bb_blit(struct buf_ops *bops, uint32_t tiling)
0, 0, width, height, 0);
intel_bb_blt_copy(ibb,
&src, 0, 0, src.stride,
&dst, 0, 0, dst.stride,
&src, 0, 0, src.surface[0].stride,
&dst, 0, 0, dst.surface[0].stride,
intel_buf_width(&dst),
intel_buf_height(&dst),
dst.bpp);
intel_bb_blt_copy(ibb,
&dst, 0, 0, dst.stride,
&final, 0, 0, final.stride,
&dst, 0, 0, dst.surface[0].stride,
&final, 0, 0, final.surface[0].stride,
intel_buf_width(&dst),
intel_buf_height(&dst),
dst.bpp);
......
......@@ -78,13 +78,13 @@ create_buf(data_t *data, int width, int height, uint8_t color)
intel_buf_init(data->bops, buf, width/4, height, 32, 0,
I915_TILING_NONE, 0);
ptr = gem_mmap__cpu_coherent(data->drm_fd,
buf->handle, 0, buf->size, PROT_WRITE);
ptr = gem_mmap__cpu_coherent(data->drm_fd, buf->handle, 0,
buf->surface[0].size, PROT_WRITE);
for (i = 0; i < buf->size; i++)
for (i = 0; i < buf->surface[0].size; i++)
ptr[i] = color;
munmap(ptr, buf->size);
munmap(ptr, buf->surface[0].size);
return buf;
}
......@@ -106,8 +106,8 @@ static void gpgpu_fill(data_t *data, igt_fillfunc_t fill)
int i, j;
buf = create_buf(data, WIDTH, HEIGHT, COLOR_C4);
ptr = gem_mmap__device_coherent(data->drm_fd, buf->handle,
0, buf->size, PROT_READ);
ptr = gem_mmap__device_coherent(data->drm_fd, buf->handle, 0,
buf->surface[0].size, PROT_READ);
for (i = 0; i < WIDTH; i++)
for (j = 0; j < HEIGHT; j++)
buf_check(ptr, i, j, COLOR_C4);
......@@ -121,7 +121,7 @@ static void gpgpu_fill(data_t *data, igt_fillfunc_t fill)
else
buf_check(ptr, i, j, COLOR_C4);
munmap(ptr, buf->size);
munmap(ptr, buf->surface[0].size);
}
igt_simple_main
......
......@@ -80,13 +80,13 @@ create_buf(data_t *data, int width, int height, uint8_t color)
intel_buf_init(data->bops, buf, width/4, height, 32, 0,
I915_TILING_NONE, 0);
ptr = gem_mmap__cpu_coherent(data->drm_fd,
buf->handle, 0, buf->size, PROT_WRITE);
ptr = gem_mmap__cpu_coherent(data->drm_fd, buf->handle, 0,
buf->surface[0].size, PROT_WRITE);
for (i = 0; i < buf->size; i++)
for (i = 0; i < buf->surface[0].size; i++)
ptr[i] = color;
munmap(ptr, buf->size);
munmap(ptr, buf->surface[0].size);
return buf;
}
......@@ -109,7 +109,7 @@ static void media_fill(data_t *data, igt_fillfunc_t fill)
buf = create_buf(data, WIDTH, HEIGHT, COLOR_C4);
ptr = gem_mmap__device_coherent(data->drm_fd, buf->handle,
0, buf->size, PROT_READ);
0, buf->surface[0].size, PROT_READ);
for (i = 0; i < WIDTH; i++)
for (j = 0; j < HEIGHT; j++)
buf_check(ptr, i, j, COLOR_C4);
......@@ -123,7 +123,7 @@ static void media_fill(data_t *data, igt_fillfunc_t fill)
else
buf_check(ptr, i, j, COLOR_C4);
munmap(ptr, buf->size);
munmap(ptr, buf->surface[0].size);
}
igt_simple_main
......
......@@ -116,7 +116,7 @@ igt_simple_main
/* This comes from OUTPUT_SIZE requirements */
intel_buf_init(bops, &dst, 56, sizeof(int), 8, 56,
I915_TILING_NONE, 0);
dst.stride = 1;
dst.surface[0].stride = 1;
ctx = gem_context_create(drm_fd);
igt_assert(ctx);
......
......@@ -258,13 +258,14 @@ gem_get_target_spins(double dt)
I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
ptr = gem_mmap__device_coherent(gem.drm_fd, gem.buf.handle,
0, gem.buf.size, PROT_READ);
0, gem.buf.surface[0].size,
PROT_READ);
clock_gettime(CLOCK_MONOTONIC, &tdone);
gem_check_spin(ptr, spins);
munmap(ptr, gem.buf.size);
munmap(ptr, gem.buf.surface[0].size);
cur_dt = to_dt(&tstart, &tdone);
if (cur_dt > dt)
......@@ -361,9 +362,9 @@ full_enable(void)
gem_set_domain(gem.drm_fd, gem.buf.handle,
I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
ptr = gem_mmap__device_coherent(gem.drm_fd, gem.buf.handle,
0, gem.buf.size, PROT_READ);
0, gem.buf.surface[0].size, PROT_READ);
gem_check_spin(ptr, spins);
munmap(ptr, gem.buf.size);
munmap(ptr, gem.buf.surface[0].size);
check_full_enable(&stat);
}
......
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