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drm-intel-fixes-2023-01-12
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rodrigo.vivi@intel.com
58fc14e1 · drm/i915/gt: Cover rest of SVG unit MCR registers ·
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- Reserve enough fence slot for i915_vma_unbind_vsync (Nirmoy)
- Fix potential use after free (Rob Clark)
- Reset engines twice in case of reset failure (Chris)
- Use multi-cast registers for SVG Unit registers (Gustavo)