igt@i915_selftest@live@gt_mocs - dmesg-warn - *ERROR* GT0: GUC: Bad context sched_state 0x0, ctx_id .*
<6> [239.340720] i915 0000:00:02.0: [drm] GT0: GuC firmware i915/mtl_guc_70.bin version 70.13.1
<7> [239.351407] i915 0000:00:02.0: [drm:intel_guc_fw_upload [i915]] GT0: GUC: init took 8ms, freq = 2250MHz, before = 2250MHz, status = 0x8002F034, count = 0, ret = 0
<7> [239.353060] i915 0000:00:02.0: [drm:guc_enable_communication [i915]] GT0: GUC: communication enabled
<6> [239.357381] i915 0000:00:02.0: [drm] GT0: GUC: submission enabled
<6> [239.357388] i915 0000:00:02.0: [drm] GT0: GUC: SLPC enabled
<7> [239.379785] i915 0000:00:02.0: [drm:intel_guc_context_reset_process_msg [i915]] GT0: GUC: Got context reset notification: 0x1003 on bcs0, exiting = no, banned = no
<6> [239.410490] i915 0000:00:02.0: [drm] GPU HANG: ecode 12:0:00000000
<5> [239.412460] i915 0000:00:02.0: [drm] GT0: Resetting chip for mocs
<3> [239.412693] i915 0000:00:02.0: [drm] *ERROR* GT0: GUC: Bad context sched_state 0x0, ctx_id 4099
<6> [239.413178] i915 0000:00:02.0: [drm] GT0: GuC firmware i915/mtl_guc_70.bin version 70.13.1
<3> [239.421630] i915 0000:00:02.0: [drm] *ERROR* GT0: GUC: CT: Failed to process request 1002 (-EPROTO)
<3> [239.421645] i915 0000:00:02.0: [drm] *ERROR* GT0: GUC: CT: Failed to process CT message (-EPROTO) 03 00 00 00 02 10 00 90 03 10 00 00 01 00 00 00
<7> [239.455403] i915 0000:00:02.0: [drm:intel_guc_fw_upload [i915]] GT0: GUC: init took 9ms, freq = 2250MHz, before = 2250MHz, status = 0x8002F034, count = 0, ret = 0
<7> [239.456389] i915 0000:00:02.0: [drm:guc_enable_communication [i915]] GT0: GUC: communication enabled
<6> [239.459151] i915 0000:00:02.0: [drm] GT0: GUC: submission enabled
<6> [239.459156] i915 0000:00:02.0: [drm] GT0: GUC: SLPC enabled
<7> [239.481901] i915 0000:00:02.0: [drm:intel_guc_context_reset_process_msg [i915]] GT0: GUC: Got context reset notification: 0x1003 on ccs0, exiting = no, banned = no
<6> [239.513643] i915 0000:00:02.0: [drm] GPU HANG: ecode 12:0:00000000
<5> [239.515017] i915 0000:00:02.0: [drm] GT0: Resetting chip for mocs
<6> [239.516111] i915 0000:00:02.0: [drm] GT0: GuC firmware i915/mtl_guc_70.bin version 70.13.1
<7> [239.526403] i915 0000:00:02.0: [drm:intel_guc_fw_upload [i915]] GT0: GUC: init took 8ms, freq = 2250MHz, before = 2250MHz, status = 0x8002F034, count = 0, ret = 0
<7> [239.527360] i915 0000:00:02.0: [drm:guc_enable_communication [i915]] GT0: GUC: communication enabled
<6> [239.529494] i915 0000:00:02.0: [drm] GT0: GUC: submission enabled
<6> [239.529499] i915 0000:00:02.0: [drm] GT0: GUC: SLPC enabled
<7> [239.547274] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling DC_off
<7> [239.547711] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [i915]] Setting DC state from 02 to 00
<7> [239.548317] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
<7> [239.548630] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_A
<7> [239.548943] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_B
<7> [239.549252] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_C
<7> [239.549556] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_D
<7> [239.563979] intel_gt_set_wedged called from intel_gt_set_wedged_on_fini+0xd/0x30 [i915]
<7> [239.565979] intel_gt_set_wedged called from intel_gt_set_wedged_on_fini+0xd/0x30 [i915]
<7> [239.617760] i915 0000:00:02.0: [drm:drm_client_release] drm_fb_helper
<4> [239.683338] i915: probe of 0000:00:02.0 failed with error -25
<7> [239.741788] i915 0000:00:02.0: [drm:intel_uncore_fini_mmio [i915]] Triggering Driver-FLR
<6> [239.897127] [IGT] i915_selftest: finished subtest gt_mocs, SUCCESS