Dmesg
<6> [313.188743] [IGT] i915_selftest: starting dynamic subtest gt_timelines
<5> [313.285937] Setting dangerous option live_selftests - tainting kernel
<6> [313.316564] i915 0000:00:02.0: Force probing unsupported Device ID 7d55, tainting kernel
<7> [313.317202] i915 0000:00:02.0: [drm:intel_gt_common_init_early [i915]] WOPCM: 2048K
<7> [313.317352] i915 0000:00:02.0: [drm:intel_uc_init_early [i915]] GT0: enable_guc=3 (guc:yes submission:yes huc:no slpc:yes)
<6> [313.317490] i915 0000:00:02.0: [drm] GT0: Incompatible option enable_guc=3 - HuC is not supported!
<7> [313.317505] i915 0000:00:02.0: [drm:intel_pch_type [i915]] Found Meteor Lake PCH
<7> [313.317625] i915 0000:00:02.0: [drm:intel_gt_probe_all [i915]] GT0: Setting up Primary GT
<7> [313.317730] i915 0000:00:02.0: [drm:intel_gt_probe_all [i915]] GT1: Setting up Standalone Media GT
<7> [313.317835] i915 0000:00:02.0: [drm:intel_gt_common_init_early [i915]] WOPCM: 2048K
<7> [313.317948] i915 0000:00:02.0: [drm:intel_uc_init_early [i915]] GT1: enable_guc=3 (guc:yes submission:yes huc:yes slpc:yes)
<7> [313.318145] i915 0000:00:02.0: [drm:i915_driver_probe [i915]] rawclk rate: 38400 kHz
<7> [313.318546] i915 0000:00:02.0: [drm:intel_engines_init_mmio [i915]] vdbox enable: 0000, instances: 0000
<7> [313.318638] i915 0000:00:02.0: [drm:intel_engines_init_mmio [i915]] vebox enable: 0000, instances: 0000
<7> [313.318988] i915 0000:00:02.0: [drm:intel_engines_init_mmio [i915]] vdbox enable: 0005, instances: 0005
<7> [313.319072] i915 0000:00:02.0: [drm:intel_engines_init_mmio [i915]] vebox enable: 0001, instances: 0001
<7> [313.319428] i915 0000:00:02.0: [drm:i915_ggtt_probe_hw [i915]] GGTT size = 4096M
<7> [313.319512] i915 0000:00:02.0: [drm:i915_ggtt_probe_hw [i915]] GMADR size = 0M
<7> [313.319586] i915 0000:00:02.0: [drm:i915_ggtt_probe_hw [i915]] DSM size = 0M
<6> [313.319656] i915 0000:00:02.0: [drm] VT-d active for gfx access
<6> [313.319660] i915 0000:00:02.0: vgaarb: deactivate vga console
<6> [313.319810] i915 0000:00:02.0: [drm] Using Transparent Hugepages
<7> [313.319824] i915 0000:00:02.0: [drm:i915_gem_init_stolen [i915]] GEN6_STOLEN_RESERVED = 0x0000000080400947
<7> [313.319931] i915 0000:00:02.0: [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 65536K, usable: 61440K
<7> [313.320040] i915 0000:00:02.0: [drm:init_stolen_lmem [i915]] Stolen Local memory IO start: 0x0000004000800000
<7> [313.320135] i915 0000:00:02.0: [drm:init_stolen_lmem [i915]] Stolen Local DSM base: 0x0000000000800000
<7> [313.320501] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x6fe09018
<7> [313.320633] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] ACPI OpRegion version 3.0.0
<7> [313.320739] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] Public ACPI methods supported
<7> [313.320838] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] ASLE supported
<7> [313.320930] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] ASLE extension supported
<7> [313.321019] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] Mailbox #2 for backlight present
<7> [313.321116] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA)
<7> [313.321206] i915 0000:00:02.0: [drm:intel_dram_detect [i915]] DRAM channels: 4
<7> [313.321285] i915 0000:00:02.0: [drm:i915_driver_probe [i915]] Watermark level 0 adjustment needed: yes
<7> [313.321369] i915 0000:00:02.0: [drm:icl_get_qgv_points.constprop.0 [i915]] QGV 0: DCLK=3200 tRP=52 tRDPRE=24 tRAS=104 tRCD=52 tRC=156
<7> [313.321507] i915 0000:00:02.0: [drm:icl_get_qgv_points.constprop.0 [i915]] QGV 1: DCLK=4800 tRP=78 tRDPRE=36 tRAS=154 tRCD=78 tRC=232
<7> [313.321628] i915 0000:00:02.0: [drm:icl_get_qgv_points.constprop.0 [i915]] QGV 2: DCLK=4800 tRP=78 tRDPRE=36 tRAS=154 tRCD=78 tRC=232
<7> [313.321744] i915 0000:00:02.0: [drm:icl_get_qgv_points.constprop.0 [i915]] QGV 3: DCLK=4800 tRP=78 tRDPRE=36 tRAS=154 tRCD=78 tRC=232
<7> [313.321847] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW0 / QGV 0: num_planes=0 deratedbw=23783 peakbw: 51200
<7> [313.321948] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW0 / QGV 1: num_planes=0 deratedbw=28357 peakbw: 76800
<7> [313.322048] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW0 / QGV 2: num_planes=0 deratedbw=28357 peakbw: 76800
<7> [313.322147] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW0 / QGV 3: num_planes=0 deratedbw=28357 peakbw: 76800
<7> [313.322245] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW1 / QGV 0: num_planes=0 deratedbw=31374 peakbw: 51200
<7> [313.322342] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW1 / QGV 1: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.322447] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW1 / QGV 2: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.322549] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW1 / QGV 3: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.322646] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW2 / QGV 0: num_planes=0 deratedbw=37331 peakbw: 51200
<7> [313.322741] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW2 / QGV 1: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.322835] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW2 / QGV 2: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.322926] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW2 / QGV 3: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.323017] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW3 / QGV 0: num_planes=0 deratedbw=38000 peakbw: 51200
<7> [313.323107] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW3 / QGV 1: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.323198] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW3 / QGV 2: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.323289] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW3 / QGV 3: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.323381] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW4 / QGV 0: num_planes=0 deratedbw=38000 peakbw: 51200
<7> [313.323481] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW4 / QGV 1: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.323575] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW4 / QGV 2: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.323667] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW4 / QGV 3: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.323758] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW5 / QGV 0: num_planes=0 deratedbw=38000 peakbw: 51200
<7> [313.323848] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW5 / QGV 1: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.323940] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW5 / QGV 2: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.324032] i915 0000:00:02.0: [drm:tgl_get_bw_info [i915]] BW5 / QGV 3: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [313.324497] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Set default to SSC at 120000 kHz
<7> [313.324596] i915 0000:00:02.0: [drm:intel_bios_init [i915]] VBT signature "$VBT ALDERLAKE-P ", BDB version 253
<7> [313.324693] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 1 (size 10, min size 7)
<7> [313.324791] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 2 (size 395, min size 5)
<7> [313.324886] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 9 (size 100, min size 100)
<7> [313.324979] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 12 (size 19, min size 19)
<7> [313.325072] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 27 (size 814, min size 812)
<7> [313.325164] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 40 (size 34, min size 34)
<7> [313.325254] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Generating LFP data table pointers
<7> [313.325350] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 41 (size 148, min size 148)
<7> [313.325454] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 42 (size 1366, min size 1366)
<7> [313.325548] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 43 (size 305, min size 305)
<7> [313.325642] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 44 (size 98, min size 78)
<7> [313.325733] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 52 (size 822, min size 822)
<7> [313.325823] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 56 (size 210, min size 210)
<7> [313.325910] i915 0000:00:02.0: [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 1 fdi_rx_polarity_inverted 0
<7> [313.325995] i915 0000:00:02.0: [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2
<7> [313.326083] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Expected child device config size for VBT version 253 not known; assuming 39
<7> [313.326170] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x1806
<7> [313.326259] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x60d6
<7> [313.326347] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x68c6
<7> [313.326444] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x68c6
<7> [313.326535] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x68c6
<7> [313.326624] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x68c6
<7> [313.326714] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Skipping SDVO device mapping
<7> [313.326803] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port A VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:1 DSI:0 DP++:0 LSPCON:0 USB-Type-C:0 TBT:0 DSC:0
<7> [313.326891] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port B VBT info: CRT:0 DVI:1 HDMI:1 DP:1 eDP:0 DSI:0 DP++:1 LSPCON:0 USB-Type-C:0 TBT:0 DSC:0
<7> [313.326978] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port D VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:0 DSI:0 DP++:0 LSPCON:0 USB-Type-C:1 TBT:1 DSC:0
<7> [313.327064] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port E VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:0 DSI:0 DP++:0 LSPCON:0 USB-Type-C:1 TBT:1 DSC:0
<7> [313.327148] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port F VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:0 DSI:0 DP++:0 LSPCON:0 USB-Type-C:1 TBT:1 DSC:0
<7> [313.327237] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port G VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:0 DSI:0 DP++:0 LSPCON:0 USB-Type-C:1 TBT:1 DSC:0
<7> [313.327325] i915 0000:00:02.0: [drm:intel_power_domains_init [i915]] Allowed DC state mask 4000000a
<7> [313.327450] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [i915]] Setting DC state from 00 to 00
<7> [313.327683] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_1
<7> [313.327847] i915 0000:00:02.0: [drm:intel_cdclk_dump_config [i915]] Current CDCLK 19200 kHz, VCO 0 kHz, ref 38400 kHz, bypass 19200 kHz, voltage level 0
<7> [313.327952] i915 0000:00:02.0: [drm:intel_cdclk_init_hw [i915]] Sanitizing cdclk programmed by pre-os
<7> [313.328196] i915 0000:00:02.0: [drm:gen9_dbuf_slices_update [i915]] Updating dbuf slices to 0x1
<7> [313.328391] i915 0000:00:02.0: [drm:icl_display_core_init [i915]] Unknown memory configuration; disabling address buddy logic.
<7> [313.328569] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling always-on
<7> [313.328667] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling DC_off
<7> [313.328765] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [i915]] Setting DC state from 00 to 00
<7> [313.328913] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
<7> [313.329240] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_A
<7> [313.329414] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_B
<7> [313.329572] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_C
<7> [313.329710] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_D
<7> [313.329931] i915 0000:00:02.0: [drm:intel_dmc_init [i915]] Loading i915/mtl_dmc.bin
<7> [313.331092] i915 0000:00:02.0: [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
<6> [313.339778] i915 0000:00:02.0: [drm] Finished loading DMC firmware i915/mtl_dmc.bin (v2.16)
<7> [313.340589] i915 0000:00:02.0: [drm:skl_wm_init [i915]] SAGV supported: yes, original SAGV block time: 10 us
<7> [313.340982] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 7 (7.0 usec)
<7> [313.341344] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 78 (78.0 usec)
<7> [313.341719] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 79 (79.0 usec)
<7> [313.342061] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 105 (105.0 usec)
<7> [313.342377] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 106 (106.0 usec)
<7> [313.342717] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 154 (154.0 usec)
<7> [313.346935] i915 0000:00:02.0: [drm:intel_display_driver_probe_nogem [i915]] 4 display pipes available.
<7> [313.351468] i915 0000:00:02.0: [drm:intel_cdclk_dump_config [i915]] Current CDCLK 172800 kHz, VCO 614400 kHz, ref 38400 kHz, bypass 19200 kHz, voltage level 0
<7> [313.353318] i915 0000:00:02.0: [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 652800 kHz
<7> [313.353689] i915 0000:00:02.0: [drm:intel_display_driver_probe_nogem [i915]] Max dotclock rate: 1305600 kHz
<7> [313.354064] i915 0000:00:02.0: [drm:intel_dp_aux_ch [i915]] [ENCODER:235:DDI A/PHY A] Using AUX CH A (VBT)
<7> [313.354399] i915 0000:00:02.0: [drm:intel_dp_init_connector [i915]] Adding eDP connector on [ENCODER:235:DDI A/PHY A]
<7> [313.354729] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Panel type (VBT): 2
<7> [313.355042] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Selected panel type (VBT): 2
<7> [313.355336] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] DRRS supported mode is seamless
<7> [313.355639] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Found panel mode in BIOS VBT legacy lfp table: "1024x768": 60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa
<7> [313.355912] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] VBT initial LVDS value 300
<7> [313.356179] i915 0000:00:02.0: [drm:dump_pnp_id [i915]] Panel PNPID mfg: MS_ (0x7f36), prod: 3, serial: 3, week: 0, year: 2002
<7> [313.356465] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Panel name: LFP_PanelName
<7> [313.356734] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Seamless DRRS min refresh rate: 0 Hz
<7> [313.356998] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 6, level 255, controller 0
<7> [313.357303] i915 0000:00:02.0: [drm:intel_pps_init [i915]] [ENCODER:235:DDI A/PHY A] initial power sequencer: PPS 0
<7> [313.357682] i915 0000:00:02.0: [drm:intel_pps_dump_state [i915]] bios t1_t3 0 t8 0 t9 0 t10 0 t11_t12 0
<7> [313.357929] i915 0000:00:02.0: [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 6000
<7> [313.358157] i915 0000:00:02.0: [drm:intel_pps_dump_state [i915]] spec t1_t3 2100 t8 500 t9 500 t10 5000 t11_t12 6100
<7> [313.358375] i915 0000:00:02.0: [drm:pps_init_delays [i915]] panel power up delay 200, power down delay 50, power cycle delay 600
<7> [313.358607] i915 0000:00:02.0: [drm:pps_init_delays [i915]] backlight on delay 1, off delay 200
<7> [313.358965] i915 0000:00:02.0: [drm:pps_init_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
<7> [313.359322] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling AUX_A
<7> [313.360605] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] [ENCODER:235:DDI A/PHY A] PPS 0 turning VDD on
<7> [313.360825] i915 0000:00:02.0: [drm:wait_panel_power_cycle [i915]] [ENCODER:235:DDI A/PHY A] PPS 0 wait for panel power cycle
<7> [313.361112] i915 0000:00:02.0: [drm:wait_panel_status [i915]] [ENCODER:235:DDI A/PHY A] PPS 0 mask: 0xb800000f value: 0x00000000 PP_STATUS: 0x00000000 PP_CONTROL: 0x00000060
<7> [313.361309] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [313.361605] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] [ENCODER:235:DDI A/PHY A] PPS 0 PP_STATUS: 0x00000000 PP_CONTROL: 0x00000068
<7> [313.361794] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] [ENCODER:235:DDI A/PHY A] PPS 0 panel power wasn't enabled
<7> [313.570827] i915 0000:00:02.0: [drm:drm_dp_read_dpcd_caps [drm_display_helper]] AUX A/DDI A/PHY A: DPCD: 14 14 c4 41 00 00 01 c0 02 00 00 00 00 0b 80
<7> [313.571986] i915 0000:00:02.0: [drm:drm_dp_read_desc [drm_display_helper]] AUX A/DDI A/PHY A: DP sink: OUI 38-ec-11 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000
<7> [313.572959] i915 0000:00:02.0: [drm:intel_dp_init_connector [i915]] eDP DPCD: 04 83 85
<7> [313.574392] i915 0000:00:02.0: [drm:intel_psr_init_dpcd [i915]] eDP panel supports PSR version 3
<7> [313.576897] i915 0000:00:02.0: [drm:intel_psr_init_dpcd [i915]] PSR2 supported
<7> [313.580811] i915 0000:00:02.0: [drm:intel_dp_get_dsc_sink_cap [i915]] DSC DPCD: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
<7> [313.581247] i915 0000:00:02.0: [drm:intel_dp_init_connector [i915]] FEC CAPABILITY: 0
<7> [313.592355] i915 0000:00:02.0: [drm:update_display_info] [CONNECTOR:236:eDP-1] Assigning EDID-1.4 digital sink color depth as 10 bpc.
<7> [313.592372] i915 0000:00:02.0: [drm:update_display_info] [CONNECTOR:236:eDP-1] ELD monitor
<7> [313.592379] i915 0000:00:02.0: [drm:update_display_info] [CONNECTOR:236:eDP-1] ELD size 20, SAD count 0
<7> [313.592467] i915 0000:00:02.0: [drm:intel_panel_add_edid_fixed_modes [i915]] [CONNECTOR:236:eDP-1] using preferred EDID fixed mode: "2880x1800": 90 513820 2880 2928 2960 3040 1800 1803 1809 1878 0x48 0xa
<7> [313.593537] i915 0000:00:02.0: [drm:intel_dp_wait_source_oui [i915]] [CONNECTOR:236:eDP-1] Performing OUI wait (0 ms)
<7> [313.594685] i915 0000:00:02.0: [drm:intel_panel_init [i915]] [CONNECTOR:236:eDP-1] DRRS type: none
<7> [313.595059] i915 0000:00:02.0: [drm:get_vbt_pwm_freq.isra.0 [i915]] VBT defined backlight frequency 200 Hz
<7> [313.595338] i915 0000:00:02.0: [drm:cnp_setup_backlight [i915]] [CONNECTOR:236:eDP-1] Using native PCH PWM for backlight control (controller=0)
<7> [313.595640] i915 0000:00:02.0: [drm:intel_backlight_setup [i915]] [CONNECTOR:236:eDP-1] backlight initialized, disabled, brightness 0/192000
<7> [313.596032] i915 0000:00:02.0: [drm:intel_pps_dump_state [i915]] bios t1_t3 2000 t8 1 t9 1 t10 500 t11_t12 6000
<7> [313.596255] i915 0000:00:02.0: [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 6000
<7> [313.596476] i915 0000:00:02.0: [drm:intel_pps_dump_state [i915]] spec t1_t3 2100 t8 500 t9 500 t10 5000 t11_t12 6100
<7> [313.596676] i915 0000:00:02.0: [drm:pps_init_delays [i915]] panel power up delay 200, power down delay 50, power cycle delay 600
<7> [313.596867] i915 0000:00:02.0: [drm:pps_init_delays [i915]] backlight on delay 1, off delay 200
<7> [313.597200] i915 0000:00:02.0: [drm:pps_init_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
<7> [313.597691] i915 0000:00:02.0: [drm:intel_dp_aux_ch [i915]] [ENCODER:244:DDI B/PHY B] Using AUX CH B (VBT)
<7> [313.597902] i915 0000:00:02.0: [drm:intel_dp_init_connector [i915]] Adding DP connector on [ENCODER:244:DDI B/PHY B]
<7> [313.598398] i915 0000:00:02.0: [drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on [ENCODER:244:DDI B/PHY B]
<7> [313.598585] i915 0000:00:02.0: [drm:intel_hdmi_init_connector [i915]] [ENCODER:244:DDI B/PHY B] Using DDC pin 0x2 (VBT)
<7> [313.598867] i915 0000:00:02.0: [drm:intel_dp_aux_ch [i915]] [ENCODER:262:DDI TC1/PHY TC1] Using AUX CH D (VBT)
<7> [313.599330] i915 0000:00:02.0: [drm:tc_phy_get_current_mode [i915]] Port D/TC#1: PHY mode: tbt-alt (ready: yes, owned: no, HPD: disconnected)
<7> [313.599638] i915 0000:00:02.0: [drm:intel_dp_init_connector [i915]] Adding DP connector on [ENCODER:262:DDI TC1/PHY TC1]
<7> [313.599979] i915 0000:00:02.0: [drm:intel_dp_aux_ch [i915]] [ENCODER:271:DDI TC2/PHY TC2] Using AUX CH E (VBT)
<7> [313.600210] i915 0000:00:02.0: [drm:tc_phy_get_current_mode [i915]] Port E/TC#2: PHY mode: tbt-alt (ready: yes, owned: no, HPD: disconnected)
<7> [313.600461] i915 0000:00:02.0: [drm:intel_dp_init_connector [i915]] Adding DP connector on [ENCODER:271:DDI TC2/PHY TC2]
<7> [313.600778] i915 0000:00:02.0: [drm:intel_dp_aux_ch [i915]] [ENCODER:280:DDI TC3/PHY TC3] Using AUX CH F (VBT)
<7> [313.600996] i915 0000:00:02.0: [drm:tc_phy_get_current_mode [i915]] Port F/TC#3: PHY mode: tbt-alt (ready: yes, owned: no, HPD: disconnected)
<7> [313.601207] i915 0000:00:02.0: [drm:intel_dp_init_connector [i915]] Adding DP connector on [ENCODER:280:DDI TC3/PHY TC3]
<7> [313.601487] i915 0000:00:02.0: [drm:intel_dp_aux_ch [i915]] [ENCODER:289:DDI TC4/PHY TC4] Using AUX CH G (VBT)
<7> [313.601684] i915 0000:00:02.0: [drm:tc_phy_get_current_mode [i915]] Port G/TC#4: PHY mode: tbt-alt (ready: yes, owned: no, HPD: disconnected)
<7> [313.601892] i915 0000:00:02.0: [drm:intel_dp_init_connector [i915]] Adding DP connector on [ENCODER:289:DDI TC4/PHY TC4]