igt@i915_selftest@live@gt_engines - dmesg-fail - i915/live_engine_pm_selftests: live_engine_timestamps failed with error -22

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13611/re-mtlp-9/igt@i915_selftest@live@gt_engines.html

<6> [737.736998] i915: Performing live selftests with st_random_seed=0x1c526537 st_timeout=500
<6> [737.737008] i915: Running gt_engines
<6> [737.737043] i915: Running live_engine_pm_selftests/live_engine_timestamps
<7> [737.737301] i915 0000:00:02.0: [drm:gsc_work [i915]] GSC Proxy initialized
<6> [737.743862] rcs0 elapsed:100261ns, CTX_TIMESTAMP:164917ns, RING_TIMESTAMP:164917ns
<3> [737.743872] rcs0 Mismatch between ring timestamp and walltime!
<3> [737.762008] i915/live_engine_pm_selftests: live_engine_timestamps failed with error -22
<7> [737.770039] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling DC_off
<7> [737.770487] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [i915]] Setting DC state from 02 to 00
<7> [737.771084] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
<7> [737.771394] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_A
<7> [737.771709] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_B
<7> [737.772021] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_C
<7> [737.772324] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_D
<7> [737.796902] intel_gt_set_wedged called from intel_gt_set_wedged_on_fini+0xd/0x30 [i915]
<7> [737.799791] intel_gt_set_wedged called from intel_gt_set_wedged_on_fini+0xd/0x30 [i915]
<7> [737.850747] i915 0000:00:02.0: [drm:drm_client_release] drm_fb_helper
<4> [737.912418] i915: probe of 0000:00:02.0 failed with error -22
<7> [737.971291] i915 0000:00:02.0: [drm:intel_uncore_fini_mmio [i915]] Triggering Driver-FLR
<6> [742.498711] [IGT] i915_selftest: finished subtest gt_engines, FAIL