igt@kms_pipe_crc_basic@suspend-read-crc@pipe-* - incomplete - PM: suspend entry (s2idle)
<7> [292.434146] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:277:DP-MST A]
<7> [292.434297] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:278:DP-MST B]
<7> [292.434448] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:279:DP-MST C]
<7> [292.434598] i915 0000:03:00.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:280:DP-MST D]
<7> [292.434749] i915 0000:03:00.0: [drm:verify_connector_state [i915]] [CONNECTOR:236:DP-1]
<7> [292.434924] i915 0000:03:00.0: [drm:gen9_dbuf_slices_update [i915]] Updating dbuf slices to 0xd
<7> [292.435212] i915 0000:03:00.0: [drm:gen9_dbuf_slices_update [i915]] Updating dbuf slices to 0x1
<7> [292.435483] i915 0000:03:00.0: [drm:intel_power_well_disable [i915]] disabling PW_C
<7> [292.435738] i915 0000:03:00.0: [drm:intel_power_well_disable [i915]] disabling PW_2
<7> [292.435978] i915 0000:03:00.0: [drm:intel_modeset_verify_crtc [i915]] [CRTC:182:pipe C]
<7> [292.454022] i915 0000:03:00.0: [drm:intel_power_well_disable [i915]] disabling DC_off
<7> [292.454230] i915 0000:03:00.0: [drm:gen9_enable_dc5 [i915]] Enabling DC5
<7> [292.454401] i915 0000:03:00.0: [drm:gen9_set_dc_state.part.0 [i915]] Setting DC state from 00 to 01
<6> [292.501263] PM: suspend entry (s2idle)
<6> [292.502471] Filesystems sync: 0.001 seconds