igt@kms_vblank@pipe-[abcd]-ts-continuation-suspend - incomplete - PM: suspend entry (deep)

https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1062/fi-hsw-g3258/igt@kms_vblank@pipe-b-ts-continuation-suspend.html

<7> [250.403423] i915 0000:00:02.0: [drm:intel_enable_shared_dpll [i915]] enabling WRPLL 1
<7> [250.403679] i915 0000:00:02.0: [drm:intel_enable_transcoder [i915]] enabling pipe B
<7> [250.405031] i915 0000:00:02.0: [drm:intel_audio_codec_enable [i915]] [CONNECTOR:79:HDMI-A-1][ENCODER:78:DDI B/PHY B] Enable audio codec on pipe \x01, 32 bytes ELD
<7> [250.405299] i915 0000:00:02.0: [drm:audio_config_hdmi_pixel_clock [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000)
<7> [250.405507] i915 0000:00:02.0: [drm:hsw_audio_config_update [i915]] using automatic N
<7> [250.421758] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:79:HDMI-A-1]
<7> [250.421935] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [CRTC:60:pipe B]
<7> [250.423125] i915 0000:00:02.0: [drm:verify_single_dpll_state.isra.76 [i915]] WRPLL 1
<7> [250.425325] [drm:drm_mode_setcrtc] [CRTC:75:pipe C]
<7> [250.438885] i915 0000:00:02.0: [drm:i915_fifo_underrun_reset_write [i915]] Re-arming FIFO underruns on pipe B
<6> [250.512980] PM: suspend entry (deep)
<6> [250.515795] Filesystems sync: 0.002 seconds