[CHV] Xiaomi Mi Pad 2 crashes when i915 driver loads

The Xiaomi Mi Pad 2 uses quite an unusual hardware-design for a Cherry Trail tablet. It deviates from the typical reference design based tablets in many ways.

The Mi Pad 2 does not have any DisplayPort or HDMI outouts. I suspect that as part of its unusual design it also has some supply rail which is only used for DisplayPort or HDMI not connected.

Force-enabling the dpio-common-bc powerwell as the i915 normal does at boot appears to cause the P-Unit to hang. When booting with a serial-usb console the following errors are logged before the system freezes:

 i915 0000:00:02.0: [drm] *ERROR* timeout setting power well state 00000000 (fffff3ff)
 i915 0000:00:02.0: [drm] *ERROR* Display PHY 0 is not power up
 ------------[ cut here ]------------
 i915 0000:00:02.0: DPIO read pipe A reg 0x8170 == 0xffffffff
 WARNING: CPU: 3 PID: 258 at drivers/gpu/drm/i915/intel_sideband.c:257 vlv_dpio_read+0x95/0xb0 [i915]
 ...
 Call Trace:
  chv_dpio_cmn_power_well_enable+0xab/0x210 [i915]
  __intel_display_power_get_domain.part.0+0xa0/0xc0 [i915]
  intel_power_domains_init_hw+0x26d/0x760 [i915]
  intel_modeset_init_noirq+0x5d/0x270 [i915]
  i915_driver_probe+0x6b6/0xd10 [i915]
  ...

If I disable the WARN about the register being 0xffffffff, so that the system can log some more dmesg output over the serial console before freezing, the following errors are also logged:

 i915 0000:00:02.0: [drm] *ERROR* timeout setting power well state 00000000 (fcfff3ff)
 i915 0000:00:02.0: [drm] *ERROR* Display PHY 1 is not power up

I've written a workaround patch which ignores the POWER_DOMAIN_INIT domains bit for the VLV_DISP_PW_DPIO_CMN_BC powerwell on this tablet which will let the tablet successfully boot and work with the i915 driver loaded: https://lore.kernel.org/intel-gfx/20211024155010.126275-1-hdegoede@redhat.com/ https://patchwork.freedesktop.org/patch/461048/

With this patch to disable the force-enabling of the PHY 0 / dpio-common-bc powerwell in place, this error for PHY 1 goes away. So it seems that trying the force-enabling of the PHY 0 / dpio-common-bc powerwell freezes the P-Unit, causing the subsequent enabling of PHY 1 to also fail (and causing the entire system to freeze within seconds).

dmesg of successfull boot with workaround, with drm.debug=0x1e VBT dump