[CI][BAT] igt@i915_module_reload@.*|igt@i915_pm_rpm@module-reload - dmesg-warn - *ERROR* VBT incorrectly claims port D is not TypeC legacy

Submitted by LAKSHMINARAYANA VUDUM @l4kshmi

Assigned to Intel GFX Bugs mailing list

Link to original bug (#110595)

Description

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6030/fi-icl-u2/igt@i915_module_load@reload.html

<6> [356.072705] Console: switching to colour dummy device 80x25
<6> [356.072750] [IGT] i915_module_load: executing
<6> [356.077396] [IGT] i915_module_load: starting subtest reload
<7> [356.197423] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
<7> [356.197490] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
<7> [356.197521] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
<7> [356.197548] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
<7> [356.197572] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
<7> [356.197594] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
<7> [356.197619] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
<7> [356.197645] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
<7> [356.197665] [drm:i915_audio_component_get_eld [i915]] Not valid for port E
<7> [356.197685] [drm:i915_audio_component_get_eld [i915]] Not valid for port E
<7> [356.197705] [drm:i915_audio_component_get_eld [i915]] Not valid for port E
<7> [356.197724] [drm:i915_audio_component_get_eld [i915]] Not valid for port F
<7> [356.197744] [drm:i915_audio_component_get_eld [i915]] Not valid for port F
<7> [356.197763] [drm:i915_audio_component_get_eld [i915]] Not valid for port F
<7> [356.332543] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 307200 kHz, actual 307200 kHz
<7> [356.332579] [drm:intel_atomic_check [i915]] New voltage level calculated to be logical 0, actual 0
<7> [356.332666] [drm:skl_compute_wm [i915]] [PLANE:30:plane 1A] ddb ( 0 - 467) -> ( 0 - 0), size 467 -> 0
<7> [356.332688] [drm:skl_compute_wm [i915]] [PLANE:79:cursor A] ddb ( 467 - 512) -> ( 0 - 0), size 45 -> 0
<7> [356.332707] [drm:skl_compute_wm [i915]] [PLANE:30:plane 1A] level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm -> wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm
<7> [356.332726] [drm:skl_compute_wm [i915]] [PLANE:30:plane 1A] lines 1, 3, 3, 3, 5, 7, 12, 13, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [356.332744] [drm:skl_compute_wm [i915]] [PLANE:30:plane 1A] blocks 11, 94, 94, 94, 156, 218, 373, 404, 25 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [356.332762] [drm:skl_compute_wm [i915]] [PLANE:30:plane 1A] min_ddb 14, 105, 105, 105, 173, 241, 412, 446, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [356.332781] [drm:skl_compute_wm [i915]] [PLANE:83:plane 1B] ddb ( 512 - 742) -> ( 0 - 0), size 230 -> 0
<7> [356.332799] [drm:skl_compute_wm [i915]] [PLANE:132:cursor B] ddb ( 742 - 768) -> ( 0 - 0), size 26 -> 0
<7> [356.332816] [drm:skl_compute_wm [i915]] [PLANE:83:plane 1B] level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm -> wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm
<7> [356.332834] [drm:skl_compute_wm [i915]] [PLANE:83:plane 1B] lines 1, 2, 2, 2, 3, 4, 6, 7, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [356.332852] [drm:skl_compute_wm [i915]] [PLANE:83:plane 1B] blocks 5, 33, 33, 33, 49, 65, 97, 113, 19 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [356.332870] [drm:skl_compute_wm [i915]] [PLANE:83:plane 1B] min_ddb 7, 38, 38, 38, 55, 73, 108, 126, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [356.332888] [drm:skl_compute_wm [i915]] [PLANE:136:plane 1C] ddb ( 768 - 998) -> ( 0 - 0), size 230 -> 0
<7> [356.332905] [drm:skl_compute_wm [i915]] [PLANE:185:cursor C] ddb ( 998 - 1024) -> ( 0 - 0), size 26 -> 0
<7> [356.332923] [drm:skl_compute_wm [i915]] [PLANE:136:plane 1C] level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm -> wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm
<7> [356.332941] [drm:skl_compute_wm [i915]] [PLANE:136:plane 1C] lines 1, 2, 2, 2, 3, 4, 6, 7, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [356.332958] [drm:skl_compute_wm [i915]] [PLANE:136:plane 1C] blocks 5, 33, 33, 33, 49, 65, 97, 113, 19 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [356.332976] [drm:skl_compute_wm [i915]] [PLANE:136:plane 1C] min_ddb 7, 38, 38, 38, 55, 73, 108, 126, 0 -> 0, 0, 0, 0, 0, 0, 0, 0, 0
<7> [356.333668] [drm:intel_psr_disable_locked [i915]] Disabling PSR2
<7> [356.334364] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
<7> [356.334506] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006f
<7> [356.334777] [drm:intel_edp_backlight_off [i915]]
<7> [356.539194] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
<7> [356.539410] [drm:intel_disable_pipe [i915]] disabling pipe A
<7> [356.553644] [drm:intel_edp_panel_off.part.34 [i915]] Turn eDP port A panel power off
<7> [356.553831] [drm:intel_edp_panel_off.part.34 [i915]] Wait for panel power off time
<7> [356.554032] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000060
<7> [356.606757] [drm:wait_panel_status [i915]] Wait complete
<7> [356.606976] [drm:intel_power_well_disable [i915]] disabling DDI A IO
<7> [356.607335] [drm:intel_power_well_disable [i915]] disabling AUX A
<7> [356.607574] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
<7> [356.607780] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 82
<7> [356.607982] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
<7> [356.608325] [drm:intel_disable_pipe [i915]] disabling pipe B
<7> [356.609137] [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00010000, dig 0x0000008a, pins 0x00000010, long 0x00000010
<7> [356.609243] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
<7> [356.609349] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 10
<7> [356.609489] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
<7> [356.623373] [drm:intel_power_well_disable [i915]] disabling DDI C IO
<7> [356.623445] [drm:intel_power_well_disable [i915]] disabling AUX C
<7> [356.623541] [drm:intel_disable_shared_dpll [i915]] disable MG PLL 1 (active 2, on? 1) for crtc 135
<7> [356.623663] [drm:intel_disable_shared_dpll [i915]] disabling MG PLL 1
<7> [356.623803] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on transcoder C
<7> [356.623917] [drm:intel_disable_pipe [i915]] disabling pipe C
<7> [356.634742] [drm:intel_power_well_disable [i915]] disabling DDI D IO
<7> [356.634771] [drm:intel_power_well_disable [i915]] disabling AUX D
<7> [356.634804] [drm:intel_disable_shared_dpll [i915]] disable MG PLL 2 (active 4, on? 1) for crtc 188
<7> [356.634854] [drm:intel_disable_shared_dpll [i915]] disabling MG PLL 2
<7> [356.634889] [drm:intel_atomic_commit_tail [i915]] [ENCODER:189:DDI A]
<7> [356.634920] [drm:intel_atomic_commit_tail [i915]] [ENCODER:195:DDI B]
<7> [356.634943] [drm:intel_atomic_commit_tail [i915]] [ENCODER:197:DP-MST A]
<7> [356.634966] [drm:intel_atomic_commit_tail [i915]] [ENCODER:198:DP-MST B]
<7> [356.634988] [drm:intel_atomic_commit_tail [i915]] [ENCODER:199:DP-MST C]
<7> [356.635010] [drm:intel_atomic_commit_tail [i915]] [ENCODER:209:DDI C]
<7> [356.635037] [drm:intel_atomic_commit_tail [i915]] [ENCODER:214:DDI D]
<7> [356.635088] [drm:intel_atomic_commit_tail [i915]] [ENCODER:216:DP-MST A]
<7> [356.635110] [drm:intel_atomic_commit_tail [i915]] [ENCODER:217:DP-MST B]
<7> [356.635132] [drm:intel_atomic_commit_tail [i915]] [ENCODER:218:DP-MST C]
<7> [356.635153] [drm:intel_atomic_commit_tail [i915]] [ENCODER:221:DDI E]
<7> [356.635174] [drm:intel_atomic_commit_tail [i915]] [ENCODER:224:DDI F]
<7> [356.635195] [drm:intel_atomic_commit_tail [i915]] [ENCODER:226:DP-MST A]
<7> [356.635216] [drm:intel_atomic_commit_tail [i915]] [ENCODER:227:DP-MST B]
<7> [356.635237] [drm:intel_atomic_commit_tail [i915]] [ENCODER:228:DP-MST C]
<7> [356.635269] [drm:verify_connector_state.isra.81 [i915]] [CONNECTOR:190:eDP-1]
<7> [356.635324] [drm:verify_connector_state.isra.81 [i915]] [CONNECTOR:210:HDMI-A-2]
<7> [356.635370] [drm:verify_connector_state.isra.81 [i915]] [CONNECTOR:215:DP-2]
<7> [356.635409] [drm:verify_single_dpll_state.isra.116 [i915]] DPLL 0
<7> [356.635435] [drm:verify_single_dpll_state.isra.116 [i915]] DPLL 1
<7> [356.635461] [drm:verify_single_dpll_state.isra.116 [i915]] TBT PLL
<7> [356.635485] [drm:verify_single_dpll_state.isra.116 [i915]] MG PLL 1
<7> [356.635510] [drm:verify_single_dpll_state.isra.116 [i915]] MG PLL 2
<7> [356.635533] [drm:verify_single_dpll_state.isra.116 [i915]] MG PLL 3
<7> [356.635557] [drm:verify_single_dpll_state.isra.116 [i915]] MG PLL 4
<7> [356.635623] [drm:intel_atomic_commit_tail [i915]] [CRTC:82:pipe A]
<7> [356.635665] [drm:intel_atomic_commit_tail [i915]] [CRTC:135:pipe B]
<7> [356.635706] [drm:intel_atomic_commit_tail [i915]] [CRTC:188:pipe C]
<7> [356.635829] [drm:intel_enable_sagv [i915]] Enabling SAGV
<7> [356.646199] [drm:intel_power_well_enable [i915]] enabling AUX A
<7> [356.646244] [drm:intel_power_well_disable [i915]] disabling AUX A
<7> [356.646450] [drm:icl_tc_phy_disconnect [i915]] Port C TC type legacy disconnected
<7> [356.646527] [drm:icl_tc_phy_disconnect [i915]] Port D TC type legacy disconnected
<7> [356.707163] i915 Wakeref last acquired:
intel_display_power_get+0x18/0x50 [i915]
intel_dp_detect+0x89/0x5b0 [i915]
drm_helper_probe_detect_ctx+0x67/0xd0
drm_helper_hpd_irq_event+0xa5/0x120
i915_hpd_poll_init_work+0xc6/0x100 [i915]
process_one_work+0x245/0x610
worker_thread+0x37/0x380
kthread+0x119/0x130
<7> [356.707220] i915 Wakeref last released:
intel_runtime_suspend+0xc3/0x240 [i915]
pci_pm_runtime_suspend+0x5a/0x190
__rpm_callback+0xb1/0x110
rpm_callback+0x1a/0x70
rpm_suspend+0xfc/0x630
pm_runtime_work+0x6e/0xb0
process_one_work+0x245/0x610
worker_thread+0x37/0x380
<7> [356.707224] i915 Wakeref count: 36
<7> [356.707487] i915 Wakeref x2 taken at:
intel_display_power_get+0x18/0x50 [i915]
modeset_get_crtc_power_domains+0x119/0x130 [i915]
intel_atomic_commit_tail+0xd9/0x1340 [i915]
intel_atomic_commit+0x240/0x2e0 [i915]
drm_atomic_helper_set_config+0x7b/0x90
drm_mode_setcrtc+0x199/0x710
drm_ioctl_kernel+0x83/0xf0
drm_ioctl+0x2f3/0x3b0
<7> [356.707788] i915 Wakeref x19 taken at:
intel_display_power_get+0x18/0x50 [i915]
modeset_get_crtc_power_domains+0x119/0x130 [i915]
intel_atomic_commit_tail+0xd9/0x1340 [i915]
intel_atomic_commit+0x240/0x2e0 [i915]
restore_fbdev_mode_atomic+0x1da/0x1f0
drm_fb_helper_restore_fbdev_mode_unlocked+0x42/0x90
intel_fbdev_restore_mode+0x2b/0x70 [i915]
drm_lastclose+0x2a/0x50
<7> [356.708183] i915 Wakeref x1 taken at:
intel_display_power_get+0x18/0x50 [i915]
edp_panel_vdd_on+0xd5/0x210 [i915]
intel_dp_aux_xfer+0x8d/0x890 [i915]
intel_dp_aux_transfer+0xa7/0x200 [i915]
drm_dp_dpcd_access+0x76/0x110
drm_dp_dpcd_read+0x29/0xc0
intel_dp_get_dsc_sink_cap+0x54/0xe0 [i915]
intel_dp_detect+0x1fc/0x5b0 [i915]
<7> [356.708482] i915 Wakeref x1 taken at:
intel_display_power_get+0x18/0x50 [i915]
edp_panel_vdd_on+0xd5/0x210 [i915]
intel_dp_aux_xfer+0x8d/0x890 [i915]
intel_dp_aux_transfer+0x124/0x200 [i915]
drm_dp_dpcd_access+0x76/0x110
drm_dp_dpcd_write+0x21/0x90
intel_psr_disable_locked+0xc5/0x140 [i915]
intel_psr_disable+0x5c/0x80 [i915]
<7> [356.708901] i915 Wakeref x2 taken at:
intel_display_power_get+0x18/0x50 [i915]
intel_ddi_pre_pll_enable+0x5e/0x200 [i915]
intel_encoders_pre_pll_enable.isra.19+0x61/0x80 [i915]
haswell_crtc_enable+0x5c/0x750 [i915]
intel_update_crtc+0x51/0x390 [i915]
skl_update_crtcs+0x1d1/0x2b0 [i915]
intel_atomic_commit_tail+0x205/0x1340 [i915]
intel_atomic_commit+0x240/0x2e0 [i915]
<7> [356.709318] i915 Wakeref x1 taken at:
intel_display_power_get+0x18/0x50 [i915]
intel_ddi_pre_enable+0x121/0xb70 [i915]
intel_encoders_pre_enable.isra.20+0x61/0x80 [i915]
haswell_crtc_enable+0x82/0x750 [i915]
intel_update_crtc+0x51/0x390 [i915]
skl_update_crtcs+0x1d1/0x2b0 [i915]
intel_atomic_commit_tail+0x205/0x1340 [i915]
intel_atomic_commit+0x240/0x2e0 [i915]
<7> [356.709610] i915 Wakeref x1 taken at:
intel_display_power_get+0x18/0x50 [i915]
edp_panel_vdd_on+0xd5/0x210 [i915]
intel_dp_aux_xfer+0x8d/0x890 [i915]
intel_dp_aux_transfer+0x124/0x200 [i915]
drm_dp_dpcd_access+0x76/0x110
drm_dp_dpcd_write+0x21/0x90
intel_dp_sink_dpms+0x4f/0x100 [i915]
intel_ddi_pre_enable+0x5f2/0xb70 [i915]
<7> [356.710008] i915 Wakeref x1 taken at:
intel_display_power_get+0x18/0x50 [i915]
intel_ddi_pre_enable+0x763/0xb70 [i915]
intel_encoders_pre_enable.isra.20+0x61/0x80 [i915]
haswell_crtc_enable+0x82/0x750 [i915]
intel_update_crtc+0x51/0x390 [i915]
skl_update_crtcs+0x1d1/0x2b0 [i915]
intel_atomic_commit_tail+0x205/0x1340 [i915]
intel_atomic_commit+0x240/0x2e0 [i915]
<7> [356.710400] i915 Wakeref x4 taken at:
intel_display_power_get+0x18/0x50 [i915]
intel_ddi_pre_pll_enable+0x5e/0x200 [i915]
intel_encoders_pre_pll_enable.isra.19+0x61/0x80 [i915]
haswell_crtc_enable+0x5c/0x750 [i915]
intel_update_crtc+0x51/0x390 [i915]
skl_update_crtcs+0x266/0x2b0 [i915]
intel_atomic_commit_tail+0x205/0x1340 [i915]
intel_atomic_commit+0x240/0x2e0 [i915]
<7> [356.710758] i915 Wakeref x2 taken at:
intel_display_power_get+0x18/0x50 [i915]
intel_ddi_pre_enable+0x763/0xb70 [i915]
intel_encoders_pre_enable.isra.20+0x61/0x80 [i915]
haswell_crtc_enable+0x82/0x750 [i915]
intel_update_crtc+0x51/0x390 [i915]
skl_update_crtcs+0x266/0x2b0 [i915]
intel_atomic_commit_tail+0x205/0x1340 [i915]
intel_atomic_commit+0x240/0x2e0 [i915]
<7> [356.711123] i915 Wakeref x2 taken at:
intel_display_power_get+0x18/0x50 [i915]
intel_ddi_pre_enable+0x121/0xb70 [i915]
intel_encoders_pre_enable.isra.20+0x61/0x80 [i915]
haswell_crtc_enable+0x82/0x750 [i915]
intel_update_crtc+0x51/0x390 [i915]
skl_update_crtcs+0x266/0x2b0 [i915]
intel_atomic_commit_tail+0x205/0x1340 [i915]
intel_atomic_commit+0x240/0x2e0 [i915]
<7> [357.197489] [drm:intel_pch_type [i915]] Found Ice Lake PCH
<7> [357.197524] [drm:i915_driver_load [i915]] WOPCM size: 1024KiB
<7> [357.197574] [drm:intel_uc_init_early [i915]] enable_guc=0 (submission:no huc:no)
<7> [357.197616] [drm:intel_uc_init_early [i915]] guc_log_level=0 (enabled:no, verbose:no, verbosity:0)
<7> [357.197652] [drm:intel_power_domains_init [i915]] Allowed DC state mask 0b
<7> [357.197932] [drm:intel_device_info_init_mmio [i915]] vcs2 fused off
<7> [357.197958] [drm:intel_device_info_init_mmio [i915]] vdbox enable: 0001, instances: 0001
<7> [357.197981] [drm:intel_device_info_init_mmio [i915]] vebox enable: 0001, instances: 0001
<7> [357.198327] [drm:i915_ggtt_probe_hw [i915]] GGTT size = 4096M
<7> [357.198375] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
<7> [357.198416] [drm:i915_ggtt_probe_hw [i915]] DSM size = 60M
<6> [357.198429] i915 0000:00:02.0: vgaarb: deactivate vga console
<7> [357.198682] [drm:i915_gem_init_stolen [i915]] GEN6_STOLEN_RESERVED = 0x000000004fa000c7
<7> [357.198728] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 61440K, usable: 59392K
<7> [357.198863] [drm:i915_driver_load [i915]] Initialized 7 GT workarounds
<7> [357.199193] [drm:intel_gvt_init [i915]] GVT-g is disabled by kernel params
<7> [357.199255] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x44f0f018
<7> [357.199341] [drm:intel_opregion_setup [i915]] ACPI OpRegion version 2.1.0
<7> [357.199385] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
<7> [357.199426] [drm:intel_opregion_setup [i915]] SWSCI supported
<7> [357.205518] [drm:intel_opregion_setup [i915]] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00300583
<7> [357.205565] [drm:intel_opregion_setup [i915]] ASLE supported
<7> [357.205601] [drm:intel_opregion_setup [i915]] ASLE extension supported
<7> [357.205632] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (Mailbox #4 (moved))
<7> [357.205671] [drm:i915_driver_load [i915]] DRAM type: DDR4
<7> [357.205704] [drm:skl_dram_get_dimm_info [i915]] CH0 DIMM L size: 8 GB, width: X8, ranks: 1, 16Gb DIMMs: no
<7> [357.205730] [drm:skl_dram_get_dimm_info [i915]] CH0 DIMM S size: 0 GB, width: X0, ranks: 0, 16Gb DIMMs: no
<7> [357.205768] [drm:skl_dram_get_channel_info [i915]] CH0 ranks: 1, 16Gb DIMMs: no
<7> [357.205805] [drm:skl_dram_get_dimm_info [i915]] CH1 DIMM L size: 8 GB, width: X8, ranks: 1, 16Gb DIMMs: no
<7> [357.205842] [drm:skl_dram_get_dimm_info [i915]] CH1 DIMM S size: 0 GB, width: X0, ranks: 0, 16Gb DIMMs: no
<7> [357.205877] [drm:skl_dram_get_channel_info [i915]] CH1 ranks: 1, 16Gb DIMMs: no
<7> [357.205919] [drm:i915_driver_load [i915]] Memory configuration is symmetric? yes
<7> [357.205957] [drm:i915_driver_load [i915]] DRAM bandwidth: 8533344 kBps, channels: 2
<7> [357.205991] [drm:i915_driver_load [i915]] DRAM ranks: 1, 16Gb DIMMs: no
<6> [357.206006] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
<6> [357.206008] [drm] Driver supports precise vblank timestamp query.
<7> [357.206065] [drm:intel_bios_init [i915]] Set default to SSC at 120000 kHz
<7> [357.206131] [drm:intel_bios_init [i915]] VBT signature "$VBT ICELAKE ", BDB version 224
<7> [357.206176] [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 1 fdi_rx_polarity_inverted 0
<7> [357.206217] [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2
<7> [357.206255] [drm:intel_bios_init [i915]] Expected child device config size for VBT version 224 not known; assuming 39
<7> [357.209091] [drm:intel_opregion_get_panel_type [i915]] Ignoring OpRegion panel type (0)
<7> [357.209152] [drm:intel_bios_init [i915]] Panel type: 2 (VBT)
<7> [357.209191] [drm:intel_bios_init [i915]] DRRS supported mode is seamless
<7> [357.209233] [drm:intel_bios_init [i915]] Found panel mode in BIOS VBT tables:
<7> [357.209239] [drm:drm_mode_debug_printmodeline] Modeline "1024x768": 0 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa
<7> [357.209283] [drm:intel_bios_init [i915]] VBT initial LVDS value 300
<7> [357.209314] [drm:intel_bios_init [i915]] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 6, level 255, controller 0
<7> [357.209343] [drm:intel_bios_init [i915]] DRRS State Enabled:1
<7> [357.209375] [drm:intel_bios_init [i915]] Skipping SDVO device mapping
<7> [357.209400] [drm:intel_bios_init [i915]] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0 TCUSB:0 TBT:0
<7> [357.209425] [drm:intel_bios_init [i915]] VBT HDMI level shift for port A: 0
<7> [357.209448] [drm:intel_bios_init [i915]] VBT DP max link rate for port A: 810000
<7> [357.209471] [drm:intel_bios_init [i915]] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0 TCUSB:0 TBT:0
<7> [357.209494] [drm:intel_bios_init [i915]] VBT HDMI level shift for port B: 0
<7> [357.209531] [drm:intel_bios_init [i915]] VBT DP max link rate for port B: 810000
<7> [357.209567] [drm:intel_bios_init [i915]] Port C VBT info: DP:0 HDMI:1 DVI:1 EDP:0 CRT:0 TCUSB:0 TBT:0
<7> [357.209597] [drm:intel_bios_init [i915]] VBT HDMI level shift for port C: 0
<7> [357.209633] [drm:intel_bios_init [i915]] VBT DP max link rate for port C: 810000
<7> [357.209666] [drm:intel_bios_init [i915]] Port D VBT info: DP:1 HDMI:0 DVI:0 EDP:0 CRT:0 TCUSB:1 TBT:1
<7> [357.209692] [drm:intel_bios_init [i915]] VBT HDMI level shift for port D: 0
<7> [357.209715] [drm:intel_bios_init [i915]] VBT DP max link rate for port D: 810000
<7> [357.209737] [drm:intel_bios_init [i915]] Port E VBT info: DP:1 HDMI:0 DVI:0 EDP:0 CRT:0 TCUSB:1 TBT:1
<7> [357.209758] [drm:intel_bios_init [i915]] VBT HDMI level shift for port E: 0
<7> [357.209779] [drm:intel_bios_init [i915]] VBT DP max link rate for port E: 810000
<7> [357.209799] [drm:intel_bios_init [i915]] Port F VBT info: DP:1 HDMI:0 DVI:0 EDP:0 CRT:0 TCUSB:1 TBT:1
<7> [357.209819] [drm:intel_bios_init [i915]] VBT HDMI level shift for port F: 0
<7> [357.209839] [drm:intel_bios_init [i915]] VBT DP max link rate for port F: 810000
<7> [357.210207] [drm:intel_dsm_detect [i915]] no _DSM method for intel device
<7> [357.210278] [drm:i915_driver_load [i915]] rawclk rate: 19200 kHz
<7> [357.210312] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
<7> [357.210370] [drm:icl_combo_phys_init [i915]] Port A combo PHY already enabled, won't reprogram it.
<7> [357.210414] [drm:icl_combo_phys_init [i915]] Port B combo PHY already enabled, won't reprogram it.
<7> [357.210507] [drm:intel_power_well_enable [i915]] enabling power well 1
<7> [357.210558] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 307200 kHz, VCO 614400 kHz, ref 38400 kHz, bypass 50000 kHz, voltage level 0
<7> [357.210607] [drm:intel_power_well_enable [i915]] enabling always-on
<7> [357.210640] [drm:intel_power_well_enable [i915]] enabling DC off
<7> [357.210673] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
<7> [357.210729] [drm:icl_combo_phys_init [i915]] Port A combo PHY already enabled, won't reprogram it.
<7> [357.210773] [drm:icl_combo_phys_init [i915]] Port B combo PHY already enabled, won't reprogram it.
<7> [357.210800] [drm:intel_power_well_enable [i915]] enabling power well 2
<7> [357.210833] [drm:intel_power_well_enable [i915]] enabling power well 3
<7> [357.210893] [drm:intel_power_well_enable [i915]] enabling power well 4
<7> [357.210966] [drm:intel_csr_ucode_init [i915]] Loading i915/icl_dmc_ver1_07.bin
<7> [357.212852] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
<7> [357.212950] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 2 (2.0 usec)
<7> [357.212977] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 22 (22.0 usec)
<7> [357.213000] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 22 (22.0 usec)
<7> [357.213022] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 22 (22.0 usec)
<7> [357.213051] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 32 (32.0 usec)
<7> [357.213083] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 52 (52.0 usec)
<7> [357.213105] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 87 (87.0 usec)
<7> [357.213126] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 92 (92.0 usec)
<7> [357.213172] [drm:intel_modeset_init [i915]] 3 display pipes available.
<7> [357.214916] [drm:intel_dump_cdclk_state [i915]] Current CDCLK 307200 kHz, VCO 614400 kHz, ref 38400 kHz, bypass 50000 kHz, voltage level 0
<6> [357.215082] mei_hdcp mei::b638ab7e-94e2-4ea2-a552-d1c54b627f04:01: bound 0000:00:02.0 (ops i915_hdcp_component_ops [i915])
<7> [357.215220] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 652800 kHz
<7> [357.215278] [drm:intel_modeset_init [i915]] Max dotclock rate: 1305600 kHz
<7> [357.215638] [drm:intel_bios_port_aux_ch [i915]] using AUX A for port A (VBT)
<7> [357.215717] [drm:intel_dp_init_connector [i915]] Adding eDP connector on port A
<7> [357.215810] [drm:intel_power_well_enable [i915]] enabling AUX A
<7> [357.215978] [drm:intel_pps_dump_state [i915]] cur t1_t3 2000 t8 1 t9 1 t10 500 t11_t12 6000
<7> [357.216041] [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 6000
<7> [357.216106] [drm:intel_dp_init_panel_power_sequencer [i915]] panel power up delay 200, power down delay 50, power cycle delay 600
<7> [357.216149] [drm:intel_dp_init_panel_power_sequencer [i915]] backlight on delay 1, off delay 200
<7> [357.216284] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
<7> [357.216356] [drm:intel_power_well_disable [i915]] disabling AUX A
<7> [357.216440] [drm:intel_power_well_enable [i915]] enabling AUX A
<7> [357.216573] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
<7> [357.216636] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
<6> [357.217525] [drm] Finished loading DMC firmware i915/icl_dmc_ver1_07.bin (v1.7)
<7> [357.827412] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060
<7> [357.827558] [drm:wait_panel_status [i915]] Wait complete
<7> [357.827766] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x00000000 PP_CONTROL: 0x00000068
<7> [357.827884] [drm:edp_panel_vdd_on [i915]] eDP port A panel power wasn't enabled
<7> [358.036038] [drm:intel_dp_read_dpcd [i915]] DPCD: 14 00 c4 c1 00 00 01 c0 02 00 00 00 00 0b 00
<7> [358.036719] [drm:drm_dp_read_desc] DP sink: OUI 38-ec-11 dev-ID HW-rev 0.0 SW-rev 0.0 quirks 0x0000
<7> [358.037494] [drm:intel_dp_init_connector [i915]] eDP DPCD: 04 93 a6
<7> [358.038119] [drm:intel_psr_init_dpcd [i915]] eDP panel supports PSR version 3
<7> [358.039360] [drm:intel_psr_init_dpcd [i915]] PSR2 supported
<7> [358.041189] [drm:intel_dp_get_dsc_sink_cap [i915]] DSC DPCD: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
<7> [358.041319] [drm:intel_dp_init_connector [i915]] FEC CAPABILITY: 0
<7> [358.046229] [drm:drm_add_edid_modes] ELD: no CEA Extension found
<7> [358.046233] [drm:drm_add_display_info] non_desktop set to 0
<7> [358.046247] [drm:drm_add_display_info] non_desktop set to 0
<7> [358.046300] [drm:intel_panel_edid_fixed_mode [i915]] [CONNECTOR:190:eDP-1] using preferred mode from EDID:
<7> [358.046303] [drm:drm_mode_debug_printmodeline] Modeline "3840x2160": 60 533250 3840 3888 3920 4000 2160 2163 2168 2222 0x48 0xa
<7> [358.046346] [drm:intel_dp_init_connector [i915]] Downclock mode is not found. DRRS not supported
<7> [358.046467] [drm:intel_panel_setup_backlight [i915]] Connector eDP-1 backlight initialized, disabled, brightness 2259/96000
<7> [358.046565] [drm:intel_bios_port_aux_ch [i915]] using AUX B for port B (VBT)
<7> [358.046634] [drm:intel_dp_init_connector [i915]] Adding DP connector on port B
<7> [358.046754] [drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on port B
<7> [358.046802] [drm:intel_hdmi_init_connector [i915]] Using DDC pin 0x2 for port B (VBT)
<7> [358.046989] [drm:intel_bios_port_aux_ch [i915]] using AUX C for port C (platform default)
<7> [358.047034] [drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on port C
<7> [358.047100] [drm:intel_hdmi_init_connector [i915]] Using DDC pin 0x9 for port C (VBT)
<7> [358.047198] [drm:intel_digital_port_connected [i915]] Port C has TC type legacy
<7> [358.047242] [drm:intel_bios_port_aux_ch [i915]] using AUX D for port D (VBT)
<7> [358.047280] [drm:intel_dp_init_connector [i915]] Adding DP connector on port D
<3> [358.047379] [drm:intel_digital_port_connected [i915]] ERROR VBT incorrectly claims port D is not TypeC legacy
<7> [358.047434] [drm:intel_digital_port_connected [i915]] Port D has TC type legacy
<7> [358.047475] [drm:intel_bios_port_aux_ch [i915]] using AUX E for port E (VBT)
<7> [358.047509] [drm:intel_dp_init_connector [i915]] Adding DP connector on port E
<7> [358.047573] [drm:intel_bios_port_aux_ch [i915]] using AUX F for port F (VBT)
<7> [358.047606] [drm:intel_dp_init_connector [i915]] Adding DP connector on port F