igt@kms.* - incomplete - Re-arming FIFO underruns on pipe [ABC]

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9498/shard-tglb8/igt@kms_lease@setcrtc_implicit_plane.html

<6> [280.849430] [IGT] kms_lease: starting subtest setcrtc_implicit_plane
<7> [280.850175] [drm:drm_mode_addfb2] [FB:360]
<7> [280.900425] [drm:drm_mode_setcrtc] [CRTC:98:pipe A]
<7> [280.900472] [drm:drm_mode_setcrtc] [CONNECTOR:308:eDP-1]
<7> [280.914077] [drm:drm_mode_setcrtc] [CRTC:167:pipe B]
<7> [280.916693] [drm:drm_mode_setcrtc] [CRTC:236:pipe C]
<7> [280.919282] [drm:drm_mode_setcrtc] [CRTC:305:pipe D]
<7> [280.935410] i915 0000:00:02.0: [drm:i915_fifo_underrun_reset_write [i915]] Re-arming FIFO underruns on pipe A
<7> [280.944987] [drm:drm_mode_setcrtc] [CRTC:98:pipe A]
<7> [280.945085] [drm:drm_mode_setcrtc] [CONNECTOR:308:eDP-1]
<7> [280.956241] [drm:drm_mode_setcrtc] [CRTC:98:pipe A]
<7> [280.956325] [drm:drm_mode_setcrtc] [CONNECTOR:308:eDP-1]
<7> [280.969287] [drm:drm_mode_setcrtc] [CRTC:98:pipe A]
<7> [280.969303] [drm:drm_mode_setcrtc] [CRTC:98:pipe A]
<7> [280.969632] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hdisplay (expected 1920, found 0)
<7> [280.969740] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.crtc_htotal (expected 2104, found 0)
<7> [280.969841] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hblank_start (expected 1920, found 0)
<7> [280.969941] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hblank_end (expected 2104, found 0)
<7> [280.970147] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hsync_start (expected 1936, found 0)
<7> [280.970305] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.crtc_hsync_end (expected 1952, found 0)
<7> [280.971401] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vdisplay (expected 1080, found 0)
<7> [280.971528] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vtotal (expected 1128, found 0)
<7> [280.971649] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vblank_start (expected 1080, found 0)
<7> [280.971743] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vblank_end (expected 1128, found 0)
<7> [280.971900] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vsync_start (expected 1083, found 0)
<7> [280.972067] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.crtc_vsync_end (expected 1097, found 0)
<7> [280.972166] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.flags (2) (expected 2, found 0)
<7> [280.972297] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.flags (8) (expected 8, found 0)
<7> [280.972438] i915 0000:00:02.0: [drm:pipe_config_mismatch [i915]] [CRTC:98:pipe A] fastset mismatch in hw.adjusted_mode.crtc_clock (expected 214000, found 0)
<7> [280.972652] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] Enabled dbuf slices 0x3 -> 0x1 (out of 2 dbuf slices)
<7> [280.972800] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] ddb (   0 - 1996) -> (   0 -    0), size 1996 ->    0
<7> [280.972863] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:94:cursor A] ddb (1996 - 2048) -> (   0 -    0), size   52 ->    0
<7> [280.972929] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm,*swm ->  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm, swm
<7> [280.973026] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]   lines    1,   7,   7,   8,  11,  12,  13,  15,   0,   5 ->    0,   0,   0,   0,   0,   0,   0,   0,   0,   0
<7> [280.973096] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A]  blocks    6, 113, 113, 129, 177, 193, 209, 241,  20,  81 ->    0,   0,   0,   0,   0,   0,   0,   0,   0,   0
<7> [280.973164] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:31:plane 1A] min_ddb    8, 126, 126, 143, 196, 214, 231, 267,   0,  91 ->    0,   0,   0,   0,   0,   0,   0,   0,   0,   0
<7> [280.973272] i915 0000:00:02.0: [drm:intel_bw_atomic_check [i915]] pipe A data rate 0 num active planes 0
<7> [280.973374] i915 0000:00:02.0: [drm:intel_bw_atomic_check [i915]] QGV point 0: max bw 20061 required 0
<7> [280.973517] i915 0000:00:02.0: [drm:intel_bw_atomic_check [i915]] QGV point 1: max bw 20061 required 0
<7> [280.973618] i915 0000:00:02.0: [drm:intel_bw_atomic_check [i915]] QGV point 2: max bw 25423 required 0
<7> [280.973744] i915 0000:00:02.0: [drm:intel_bw_atomic_check [i915]] QGV point 3: max bw 22755 required 0
<7> [280.973953] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Modeset required for cdclk change
<7> [280.974246] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 172800 kHz, actual 172800 kHz
<7> [280.974403] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 0, actual 0
<7> [280.974562] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [CRTC:98:pipe A] enable: no [modeset]
<7> [280.974728] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 1A] fb: [NOFB], visible: no
<7> [280.974828] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:40:plane 2A] fb: [NOFB], visible: no
<7> [280.974926] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:49:plane 3A] fb: [NOFB], visible: no
<7> [280.975069] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:58:plane 4A] fb: [NOFB], visible: no
<7> [280.975201] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:67:plane 5A] fb: [NOFB], visible: no
<7> [280.975322] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:76:plane 6A] fb: [NOFB], visible: no
<7> [280.976300] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:85:plane 7A] fb: [NOFB], visible: no
<7> [280.976421] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:94:cursor A] fb: [NOFB], visible: no
<7> [280.984459] i915 0000:00:02.0: [drm:intel_psr_disable_locked [i915]] Disabling PSR2
<7> [281.003526] i915 0000:00:02.0: [drm:intel_edp_backlight_off [i915]] 
<7> [281.207398] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
<7> [281.207822] i915 0000:00:02.0: [drm:intel_disable_pipe [i915]] disabling pipe A
<7> [281.213700] i915 0000:00:02.0: [drm:intel_edp_panel_off.part.54 [i915]] Turn [ENCODER:307:DDI A/PHY A] panel power off
<7> [281.213980] i915 0000:00:02.0: [drm:intel_edp_panel_off.part.54 [i915]] Wait for panel power off time
<7> [281.215095] i915 0000:00:02.0: [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000002 control 00000060
<7> [281.268259] i915 0000:00:02.0: [drm:wait_panel_status [i915]] Wait complete
<7> [281.268398] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling DDI A IO
<7> [281.268530] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling AUX A
<7> [281.268653] i915 0000:00:02.0: [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
<7> [281.268770] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 98
<7> [281.268910] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
<7> [281.269208] [drm:intel_dump_cdclk_config [i915]] Changing CDCLK to 172800 kHz, VCO 345600 kHz, ref 38400 kHz, bypass 19200 kHz, voltage level 0
<7> [281.270427] i915 0000:00:02.0: [drm:intel_atomic_commit_tail [i915]] [ENCODER:307:DDI A/PHY A]
<7> [281.270550] i915 0000:00:02.0: [drm:gen8_de_irq_handler [i915]] hotplug event received, stat 0x00010000, dig 0x0000008a, pins 0x00000010, long 0x00000010
<7> [281.270737] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] digital hpd on [ENCODER:307:DDI A/PHY A] - long
<7> [281.270910] i915 0000:00:02.0: [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 10