igt@kms_pipe_crc_basic@suspend-read-crc - incomplete - PM: suspend entry (deep)
7> [322.208372] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling DDI_IO_C
<7> [322.209581] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 0x2, on? 1) for [CRTC:108:pipe B]
<7> [322.212549] i915 0000:00:02.0: [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C
<7> [322.214093] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Pre changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
<7> [322.214587] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:147:DDI B/PHY B]
<7> [322.215043] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:157:DDI C/PHY C]
<7> [322.215701] i915 0000:00:02.0: [drm:verify_connector_state [i915]] [CONNECTOR:158:HDMI-A-2]
<7> [322.216286] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling dpio-common-c
<7> [322.216881] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
<7> [322.217350] i915 0000:00:02.0: [drm:intel_modeset_verify_crtc [i915]] [CRTC:108:pipe B]
<7> [322.235755] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling DC_off
<7> [322.236296] i915 0000:00:02.0: [drm:gen9_enable_dc5 [i915]] Enabling DC5
<7> [322.236777] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [i915]] Setting DC state from 00 to 01
<7> [322.238218] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling always-on
<6> [322.337531] PM: suspend entry (deep)
<6> [322.343125] Filesystems sync: 0.005 seconds