Dmesg
<6> [199.643442] [IGT] i915_selftest: starting dynamic subtest gt_lrc
<5> [199.734068] Setting dangerous option live_selftests - tainting kernel
<6> [199.757447] i915 0000:00:02.0: [drm] Found METEORLAKE (device ID 7d51) display version 14.00 stepping D0
<7> [199.761857] i915 0000:00:02.0: [drm:intel_gt_common_init_early [i915]] WOPCM: 2048K
<7> [199.762018] i915 0000:00:02.0: [drm:intel_uc_init_early [i915]] GT0: enable_guc=3 (guc:yes submission:yes huc:no slpc:yes)
<7> [199.762180] i915 0000:00:02.0: [drm:intel_gt_probe_all [i915]] GT0: Setting up Primary GT
<7> [199.762293] i915 0000:00:02.0: [drm:intel_gt_probe_all [i915]] GT1: Setting up Standalone Media GT
<7> [199.762401] i915 0000:00:02.0: [drm:intel_gt_common_init_early [i915]] WOPCM: 2048K
<7> [199.762531] i915 0000:00:02.0: [drm:intel_uc_init_early [i915]] GT1: enable_guc=3 (guc:yes submission:yes huc:yes slpc:yes)
<7> [199.762770] i915 0000:00:02.0: [drm:intel_display_device_info_runtime_init [i915]] rawclk rate: 38400 kHz
<7> [199.763613] i915 0000:00:02.0: [drm:intel_engines_init_mmio [i915]] GT0: vdbox enable: 0000, instances: 0000
<7> [199.763735] i915 0000:00:02.0: [drm:intel_engines_init_mmio [i915]] GT0: vebox enable: 0000, instances: 0000
<7> [199.764021] i915 0000:00:02.0: [drm:intel_engines_init_mmio [i915]] GT1: vdbox enable: 0005, instances: 0005
<7> [199.764116] i915 0000:00:02.0: [drm:intel_engines_init_mmio [i915]] GT1: vebox enable: 0001, instances: 0001
<7> [199.764407] i915 0000:00:02.0: [drm:ggtt_probe_common [i915]] Using direct GSM access
<7> [199.764574] i915 0000:00:02.0: [drm:i915_ggtt_probe_hw [i915]] GGTT size = 4096M
<7> [199.764680] i915 0000:00:02.0: [drm:i915_ggtt_probe_hw [i915]] GMADR size = 0M
<7> [199.764763] i915 0000:00:02.0: [drm:i915_ggtt_probe_hw [i915]] DSM size = 0M
<6> [199.764853] i915 0000:00:02.0: [drm] VT-d active for gfx access
<6> [199.764856] i915 0000:00:02.0: vgaarb: deactivate vga console
<6> [199.764960] i915 0000:00:02.0: [drm] Using Transparent Hugepages
<7> [199.764971] i915 0000:00:02.0: [drm:i915_gem_stolen_lmem_setup [i915]] Using direct DSM access
<7> [199.765116] i915 0000:00:02.0: [drm:i915_gem_init_stolen [i915]] GEN6_STOLEN_RESERVED = 0x0000000078400947
<7> [199.765259] i915 0000:00:02.0: [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 131072K, usable: 126976K
<7> [199.766844] i915 0000:00:02.0: [drm:intel_memory_regions_hw_probe [i915]] Memory region(0): system: 15469 MiB [mem 0x00000000-0x3c6d5ffff], io: n/a
<7> [199.766955] i915 0000:00:02.0: [drm:intel_memory_regions_hw_probe [i915]] Memory region(6): stolen-local: 124 MiB [mem 0x00800000-0x083fffff], io: 124 MiB [mem 0x70800000-0x783fffff]
<7> [199.767206] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x63e1f018
<7> [199.767362] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] ACPI OpRegion version 3.0.0
<7> [199.767501] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] Public ACPI methods supported
<7> [199.767640] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] ASLE supported
<7> [199.767805] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] ASLE extension supported
<7> [199.767936] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] Mailbox #2 for backlight present
<7> [199.768075] i915 0000:00:02.0: [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA)
<7> [199.768207] i915 0000:00:02.0: [drm:intel_dram_detect [i915]] Num qgv points 4
<7> [199.768304] i915 0000:00:02.0: [drm:intel_dram_detect [i915]] DRAM channels: 8
<7> [199.768398] i915 0000:00:02.0: [drm:i915_driver_probe [i915]] Watermark level 0 adjustment needed: yes
<7> [199.768499] i915 0000:00:02.0: [drm:icl_get_qgv_points.constprop.0 [i915]] QGV 0: DCLK=3200 tRP=64 tRDPRE=40 tRAS=136 tRCD=64 tRC=200
<7> [199.768678] i915 0000:00:02.0: [drm:icl_get_qgv_points.constprop.0 [i915]] QGV 1: DCLK=4800 tRP=88 tRDPRE=72 tRAS=208 tRCD=88 tRC=296
<7> [199.768841] i915 0000:00:02.0: [drm:icl_get_qgv_points.constprop.0 [i915]] QGV 2: DCLK=8400 tRP=152 tRDPRE=96 tRAS=104 tRCD=152 tRC=256
<7> [199.769008] i915 0000:00:02.0: [drm:icl_get_qgv_points.constprop.0 [i915]] QGV 3: DCLK=5600 tRP=104 tRDPRE=80 tRAS=240 tRCD=104 tRC=344
<7> [199.769153] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW0 / QGV 0: num_planes=0 deratedbw=28913 peakbw: 51200
<7> [199.769290] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW0 / QGV 1: num_planes=0 deratedbw=36260 peakbw: 76800
<7> [199.769424] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW0 / QGV 2: num_planes=0 deratedbw=38000 peakbw: 134400
<7> [199.769556] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW0 / QGV 3: num_planes=0 deratedbw=38000 peakbw: 89600
<7> [199.769689] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW1 / QGV 0: num_planes=0 deratedbw=35532 peakbw: 51200
<7> [199.769815] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW1 / QGV 1: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [199.769941] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW1 / QGV 2: num_planes=0 deratedbw=38000 peakbw: 134400
<7> [199.770067] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW1 / QGV 3: num_planes=0 deratedbw=38000 peakbw: 89600
<7> [199.770192] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW2 / QGV 0: num_planes=0 deratedbw=38000 peakbw: 51200
<7> [199.770316] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW2 / QGV 1: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [199.770439] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW2 / QGV 2: num_planes=0 deratedbw=38000 peakbw: 134400
<7> [199.770561] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW2 / QGV 3: num_planes=0 deratedbw=38000 peakbw: 89600
<7> [199.770687] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW3 / QGV 0: num_planes=0 deratedbw=38000 peakbw: 51200
<7> [199.770809] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW3 / QGV 1: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [199.770929] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW3 / QGV 2: num_planes=0 deratedbw=38000 peakbw: 134400
<7> [199.771049] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW3 / QGV 3: num_planes=0 deratedbw=38000 peakbw: 89600
<7> [199.771167] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW4 / QGV 0: num_planes=0 deratedbw=38000 peakbw: 51200
<7> [199.771285] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW4 / QGV 1: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [199.771404] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW4 / QGV 2: num_planes=0 deratedbw=38000 peakbw: 134400
<7> [199.771522] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW4 / QGV 3: num_planes=0 deratedbw=38000 peakbw: 89600
<7> [199.771639] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW5 / QGV 0: num_planes=0 deratedbw=38000 peakbw: 51200
<7> [199.771775] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW5 / QGV 1: num_planes=0 deratedbw=38000 peakbw: 76800
<7> [199.771893] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW5 / QGV 2: num_planes=0 deratedbw=38000 peakbw: 134400
<7> [199.772010] i915 0000:00:02.0: [drm:tgl_get_bw_info.isra.0 [i915]] BW5 / QGV 3: num_planes=0 deratedbw=38000 peakbw: 89600
<7> [199.773511] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Set default to SSC at 120000 kHz
<7> [199.773713] i915 0000:00:02.0: [drm:intel_bios_init [i915]] VBT signature "$VBT METEORLAKE ", BDB version 258
<7> [199.773862] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 1 (size 10, min size 7)
<7> [199.774006] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 2 (size 405, min size 5)
<7> [199.774142] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 9 (size 100, min size 100)
<7> [199.774270] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 12 (size 19, min size 19)
<7> [199.774387] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 27 (size 814, min size 848)
<7> [199.774491] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 40 (size 34, min size 34)
<7> [199.774592] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Generating LFP data table pointers
<7> [199.774707] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 41 (size 148, min size 148)
<7> [199.774809] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 42 (size 1366, min size 1366)
<7> [199.774912] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 43 (size 305, min size 305)
<7> [199.775014] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 44 (size 136, min size 136)
<7> [199.775122] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 52 (size 822, min size 822)
<7> [199.775218] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found BDB block 56 (size 210, min size 210)
<7> [199.775311] i915 0000:00:02.0: [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 1 fdi_rx_polarity_inverted 0
<7> [199.775405] i915 0000:00:02.0: [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2
<7> [199.775498] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Expected child device config size for VBT version 258 not known; assuming 40
<7> [199.775599] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x1806
<7> [199.775717] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x68c6
<7> [199.775837] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x68c6
<7> [199.775944] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x68c6
<7> [199.776041] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x68c6
<7> [199.776136] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Found VBT child device with type 0x68c6
<7> [199.776237] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Skipping SDVO device mapping
<7> [199.776329] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port A VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:1 DSI:0 DP++:0 LSPCON:0 USB-Type-C:0 TBT:0 DSC:0
<7> [199.776421] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port B VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:0 DSI:0 DP++:0 LSPCON:0 USB-Type-C:0 TBT:0 DSC:0
<7> [199.776512] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port D VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:0 DSI:0 DP++:0 LSPCON:0 USB-Type-C:1 TBT:1 DSC:0
<7> [199.776603] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port E VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:0 DSI:0 DP++:0 LSPCON:0 USB-Type-C:1 TBT:1 DSC:0
<7> [199.776705] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port F VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:0 DSI:0 DP++:0 LSPCON:0 USB-Type-C:1 TBT:1 DSC:0
<7> [199.776796] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port G VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:0 DSI:0 DP++:0 LSPCON:0 USB-Type-C:1 TBT:1 DSC:0
<7> [199.776891] i915 0000:00:02.0: [drm:intel_power_domains_init [i915]] Allowed DC state mask 4000000a
<7> [199.777014] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [i915]] Setting DC state from 00 to 00
<7> [199.777202] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_1
<7> [199.777376] i915 0000:00:02.0: [drm:intel_cdclk_init_hw [i915]] Current CDCLK 19200 kHz, VCO 0 kHz, ref 38400 kHz, bypass 19200 kHz, voltage level 0
<7> [199.777485] i915 0000:00:02.0: [drm:intel_cdclk_init_hw [i915]] Sanitizing cdclk programmed by pre-os
<7> [199.777757] i915 0000:00:02.0: [drm:gen9_dbuf_slices_update [i915]] Updating dbuf slices to 0x1
<7> [199.777986] i915 0000:00:02.0: [drm:icl_display_core_init [i915]] Unknown memory configuration; disabling address buddy logic.
<7> [199.778136] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling always-on
<7> [199.778243] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling DC_off
<7> [199.778358] i915 0000:00:02.0: [drm:gen9_set_dc_state.part.0 [i915]] Setting DC state from 00 to 00
<7> [199.778524] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
<7> [199.778772] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_A
<7> [199.779035] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_B
<7> [199.779184] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_C
<7> [199.779333] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_D
<7> [199.779575] i915 0000:00:02.0: [drm:intel_dmc_init [i915]] Loading i915/mtl_dmc.bin
<7> [199.780071] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] DMC 0:
<7> [199.780187] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[0]: 0x8f074 = 0x86fc0
<7> [199.780297] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[1]: 0x8f034 = 0xc003b400 (EVT_CTL)
<7> [199.780406] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[2]: 0x8f004 = 0x42c0408 (EVT_HTP)
<7> [199.780512] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[3]: 0x8f038 = 0xc003b200 (EVT_CTL)
<7> [199.780551] i915 0000:00:02.0: [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
<7> [199.780619] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[4]: 0x8f008 = 0x534052f4 (EVT_HTP)
<7> [199.780741] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] DMC 1:
<7> [199.780844] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[0]: 0x5f074 = 0x96fc0
<7> [199.780951] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[1]: 0x5f034 = 0xc003df00 (EVT_CTL) (disabling)
<7> [199.781065] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[2]: 0x5f004 = 0x212c20f4 (EVT_HTP)
<7> [199.781170] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[3]: 0x5f038 = 0xc003e000 (EVT_CTL) (disabling)
<7> [199.781275] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[4]: 0x5f008 = 0x222021e8 (EVT_HTP)
<7> [199.781385] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[5]: 0x5f03c = 0xc0032c00 (EVT_CTL) (disabling)
<7> [199.781424] i915 0000:00:02.0: [drm:skl_wm_init [i915]] SAGV supported: yes, original SAGV block time: 10 us
<7> [199.781493] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[6]: 0x5f00c = 0x23f422dc (EVT_HTP)
<7> [199.781565] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 7 (7.0 usec)
<7> [199.781600] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[7]: 0x5f040 = 0xc0033100 (EVT_CTL) (disabling)
<7> [199.781693] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 88 (88.0 usec)
<7> [199.781718] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[8]: 0x5f010 = 0x26ec26c0 (EVT_HTP)
<7> [199.781817] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 89 (89.0 usec)
<7> [199.781832] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] DMC 2:
<7> [199.781945] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[0]: 0x5f474 = 0x9efc0
<7> [199.781940] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 99 (99.0 usec)
<7> [199.782057] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[1]: 0x5f434 = 0xc003df00 (EVT_CTL) (disabling)
<7> [199.782063] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 100 (100.0 usec)
<7> [199.782170] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[2]: 0x5f404 = 0xa618a5e0 (EVT_HTP)
<7> [199.782187] i915 0000:00:02.0: [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 154 (154.0 usec)
<7> [199.782286] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[3]: 0x5f438 = 0xc003e000 (EVT_CTL) (disabling)
<7> [199.782397] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[4]: 0x5f408 = 0xa70ca6d4 (EVT_HTP)
<7> [199.782502] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[5]: 0x5f43c = 0xc0032c00 (EVT_CTL) (disabling)
<7> [199.782625] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[6]: 0x5f40c = 0xa8e0a7c8 (EVT_HTP)
<7> [199.782761] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[7]: 0x5f440 = 0xc0033100 (EVT_CTL) (disabling)
<7> [199.782867] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[8]: 0x5f410 = 0xabd8abac (EVT_HTP)
<7> [199.782979] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] DMC 3:
<7> [199.783085] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[0]: 0x5f874 = 0x53fc0
<7> [199.783192] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[1]: 0x5f83c = 0xc0032c00 (EVT_CTL) (disabling)
<7> [199.783191] i915 0000:00:02.0: [drm:intel_display_driver_probe_nogem [i915]] 4 display pipes available.
<7> [199.783308] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[2]: 0x5f80c = 0x24a02388 (EVT_HTP)
<7> [199.783425] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[3]: 0x5f840 = 0xc0033100 (EVT_CTL) (disabling)
<7> [199.783541] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[4]: 0x5f810 = 0x2798276c (EVT_HTP)
<7> [199.783659] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] DMC 4:
<7> [199.783801] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[0]: 0x5fc74 = 0x5afc0
<7> [199.783917] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[1]: 0x5fc3c = 0xc0032c00 (EVT_CTL) (disabling)
<7> [199.784032] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[2]: 0x5fc0c = 0x94a09388 (EVT_HTP)
<7> [199.784156] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[3]: 0x5fc40 = 0xc0033100 (EVT_CTL) (disabling)
<7> [199.784283] i915 0000:00:02.0: [drm:dmc_load_work_fn [i915]] mmio[4]: 0x5fc10 = 0x9798976c (EVT_HTP)
<7> [199.793608] i915 0000:00:02.0: [drm:intel_cdclk_dump_config [i915]] Current CDCLK 172800 kHz, VCO 614400 kHz, ref 38400 kHz, bypass 19200 kHz, voltage level 0
<6> [199.793720] i915 0000:00:02.0: [drm] Finished loading DMC firmware i915/mtl_dmc.bin (v2.23)
<7> [199.793752] i915 0000:00:02.0: [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 652800 kHz
<7> [199.793891] i915 0000:00:02.0: [drm:intel_display_driver_probe_nogem [i915]] Max dotclock rate: 1305600 kHz
<7> [199.794066] i915 0000:00:02.0: [drm:intel_dp_aux_ch [i915]] [ENCODER:240:DDI A/PHY A] Using AUX CH A (VBT)
<7> [199.794191] i915 0000:00:02.0: [drm:intel_dp_init_connector [i915]] Adding eDP connector on [ENCODER:240:DDI A/PHY A]
<7> [199.794304] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Panel type (VBT): 2
<7> [199.794423] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Selected panel type (VBT): 2
<7> [199.794541] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] DRRS supported mode is seamless
<7> [199.794661] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Found panel mode in BIOS VBT legacy lfp table: "1024x768": 60 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa
<7> [199.794802] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] VBT initial LVDS value 300
<7> [199.794942] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Panel manufacturer name: MS_, product code: 3, serial number: 3, year of manufacture: 2002
<7> [199.795090] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Panel name: LFP_PanelName
<7> [199.795236] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] Seamless DRRS min refresh rate: 0 Hz
<7> [199.795373] i915 0000:00:02.0: [drm:intel_bios_init_panel [i915]] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 6, level 255, controller 0
<7> [199.795536] i915 0000:00:02.0: [drm:intel_pps_init [i915]] [ENCODER:240:DDI A/PHY A] initial power sequencer: PPS 0
<7> [199.795707] i915 0000:00:02.0: [drm:intel_pps_dump_state [i915]] bios t1_t3 0 t8 0 t9 0 t10 0 t11_t12 0
<7> [199.795826] i915 0000:00:02.0: [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 6000
<7> [199.795946] i915 0000:00:02.0: [drm:pps_init_delays [i915]] spec t1_t3 2100 t8 500 t9 500 t10 5000 t11_t12 6100
<7> [199.796067] i915 0000:00:02.0: [drm:pps_init_delays [i915]] panel power up delay 200, power down delay 50, power cycle delay 600
<7> [199.796186] i915 0000:00:02.0: [drm:pps_init_delays [i915]] backlight on delay 1, off delay 200
<7> [199.796430] i915 0000:00:02.0: [drm:pps_init_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
<7> [199.796692] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling AUX_A
<7> [199.798111] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] [ENCODER:240:DDI A/PHY A] PPS 0 turning VDD on
<7> [199.798331] i915 0000:00:02.0: [drm:wait_panel_power_cycle [i915]] [ENCODER:240:DDI A/PHY A] PPS 0 wait for panel power cycle
<7> [199.798538] i915 0000:00:02.0: [drm:wait_panel_status [i915]] [ENCODER:240:DDI A/PHY A] PPS 0 mask: 0xb800000f value: 0x00000000 PP_STATUS: 0x00000000 PP_CONTROL: 0x00000060