Display distortion with powerprofile mid or low
Submitted by bug..@..og.com
Assigned to Default DRI bug account
Description
Overview:
The display is distorted when power-profile low or mid is activated.
Steps to reproduce:
echo low > /sys/class/drm/card0/device/power_profile
or
echo mid > /sys/class/drm/card0/device/power_profile
Actual Results:
The display is distorted, but the system is still usable. The distortion
consists of noisy flickering vertical stripes, with columns between them
that look ok. When I choose powerprofile default or auto or high the
distortion goes away and everything's as before.
Output of
cat /sys/kernel/debug/dri/{0,64}/radeon_pm_info:
With powerprofile default:
default engine clock: 500000 kHz
current engine clock: 499500 kHz
default memory clock: 600000 kHz
current memory clock: 594000 kHz
voltage: 1000 mV
PCIE lanes: 16
default engine clock: 500000 kHz
current engine clock: 499500 kHz
default memory clock: 600000 kHz
current memory clock: 594000 kHz
voltage: 1000 mV
PCIE lanes: 16
With powerprofile mid:
default engine clock: 500000 kHz
current engine clock: 124870 kHz
default memory clock: 600000 kHz
current memory clock: 405000 kHz
voltage: 900 mV
PCIE lanes: 16
default engine clock: 500000 kHz
current engine clock: 124870 kHz
default memory clock: 600000 kHz
current memory clock: 405000 kHz
voltage: 900 mV
PCIE lanes: 16
With powerprofile low:
default engine clock: 500000 kHz
current engine clock: 124870 kHz
default memory clock: 600000 kHz
current memory clock: 405000 kHz
voltage: 900 mV
PCIE lanes: 16
default engine clock: 500000 kHz
current engine clock: 124870 kHz
default memory clock: 600000 kHz
current memory clock: 405000 kHz
voltage: 900 mV
PCIE lanes: 16
With powerprofile high:
default engine clock: 500000 kHz
current engine clock: 499500 kHz
default memory clock: 600000 kHz
current memory clock: 594000 kHz
voltage: 1000 mV
PCIE lanes: 16
default engine clock: 500000 kHz
current engine clock: 499500 kHz
default memory clock: 600000 kHz
current memory clock: 594000 kHz
voltage: 1000 mV
PCIE lanes: 16
Expected Results:
No display distortion and perhaps other values in radeon_pm_info (values of
mid and low profile should differ and perhaps there should have been some
lanes deactivated by these profiles).
Btw. there is no such problem when I use the powermanagement-features in
xorg.conf (ForceLowPowerMode, ClockGating, DynamicPM) without KMS enabled.
Versions:
See attached logfiles.
Bug exists since power-profiles had been introduced (in kernel 2.6.34 or
2.6.35).