Commit 5f258157 authored by Daniel Schürmann's avatar Daniel Schürmann
Browse files

aco: remove all occurences of p_wqm

parent d99b4da4
Pipeline #263842 waiting for manual action with stages
......@@ -180,7 +180,7 @@ void get_block_needs(wqm_ctx &ctx, exec_ctx &exec_ctx, Block* block)
* However, parallelcopies inserted by RA must be. */
if (instr->format == Format::MIMG && instr->mimg().wqm_mask)
needs = WQM;
bool propagate_wqm = instr->opcode == aco_opcode::p_wqm;
bool propagate_wqm = false;
bool preserve_wqm = instr->opcode == aco_opcode::p_discard_if;
bool pred_by_exec = needs_exec_mask(instr.get());
for (Definition& definition : instr->definitions) {
......@@ -230,8 +230,7 @@ void get_block_needs(wqm_ctx &ctx, exec_ctx &exec_ctx, Block* block)
}
}
if ((instr->opcode == aco_opcode::p_logical_end && info.logical_end_wqm) ||
instr->opcode == aco_opcode::p_wqm) {
if (instr->opcode == aco_opcode::p_logical_end && info.logical_end_wqm) {
assert(needs != Exact);
needs = WQM;
}
......
......@@ -1822,7 +1822,7 @@ public:
RegClass lane_mask;
Stage stage;
bool needs_exact = false; /* there exists an instruction with disable_wqm = true */
bool needs_wqm = false; /* there exists a p_wqm instruction */
bool needs_wqm = false; /* there exists an instruction which must be computed in WQM */
std::vector<uint8_t> constant_data;
Temp private_segment_buffer;
......
......@@ -1873,7 +1873,6 @@ void lower_to_hw_instr(Program* program)
break;
}
case aco_opcode::p_parallelcopy:
case aco_opcode::p_wqm:
{
std::map<PhysReg, copy_operation> copy_operations;
for (unsigned j = 0; j < instr->operands.size(); j++) {
......
......@@ -279,7 +279,6 @@ opcode("p_reload")
opcode("p_start_linear_vgpr")
opcode("p_end_linear_vgpr")
opcode("p_wqm")
opcode("p_discard_if")
opcode("p_load_helper")
opcode("p_demote_to_helper")
......
......@@ -745,7 +745,6 @@ bool alu_can_accept_constant(aco_opcode opcode, unsigned operand)
return operand != 2;
case aco_opcode::s_addk_i32:
case aco_opcode::s_mulk_i32:
case aco_opcode::p_wqm:
case aco_opcode::p_extract_vector:
case aco_opcode::p_split_vector:
case aco_opcode::v_readlane_b32:
......@@ -1539,12 +1538,6 @@ void label_instruction(opt_ctx &ctx, Block& block, aco_ptr<Instruction>& instr)
instr->operands[2].setTemp(ctx.info[instr->operands[2].tempId()].temp);
}
break;
case aco_opcode::p_wqm:
if (instr->operands[0].isTemp() &&
ctx.info[instr->operands[0].tempId()].is_scc_invert()) {
ctx.info[instr->definitions[0].tempId()].set_temp(instr->operands[0].getTemp());
}
break;
default:
break;
}
......@@ -3429,14 +3422,6 @@ void select_instruction(opt_ctx &ctx, aco_ptr<Instruction>& instr)
instr->opcode == aco_opcode::s_cselect_b32) &&
instr->operands[2].isTemp()) {
ctx.info[instr->operands[2].tempId()].set_scc_needed();
} else if (instr->opcode == aco_opcode::p_wqm &&
instr->operands[0].isTemp() &&
ctx.info[instr->definitions[0].tempId()].is_scc_needed()) {
/* Propagate label so it is correctly detected by the uniform bool transform */
ctx.info[instr->operands[0].tempId()].set_scc_needed();
/* Fix definition to SCC, this will prevent RA from adding superfluous moves */
instr->definitions[0].setFixed(scc);
}
/* check for literals */
......
......@@ -1535,7 +1535,6 @@ void handle_pseudo(ra_ctx& ctx,
case aco_opcode::p_create_vector:
case aco_opcode::p_split_vector:
case aco_opcode::p_parallelcopy:
case aco_opcode::p_wqm:
break;
default:
return;
......@@ -2298,7 +2297,7 @@ void register_allocation(Program *program, std::vector<IDSet>& live_out_per_bloc
reg.reg_b += instr->definitions[j].bytes();
if (get_reg_specified(ctx, register_file, definition->regClass(), instr, reg))
definition->setFixed(reg);
} else if (instr->opcode == aco_opcode::p_wqm || instr->opcode == aco_opcode::p_parallelcopy) {
} else if (instr->opcode == aco_opcode::p_parallelcopy) {
PhysReg reg = instr->operands[i].physReg();
if (instr->operands[i].isTemp() &&
instr->operands[i].getTemp().type() == definition->getTemp().type() &&
......
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