1. 19 Jan, 2022 1 commit
    • Connor Abbott's avatar
      tu/blit: Don't set CLAMPENABLE in sampler for 3d path · db703917
      Connor Abbott authored
      This was copied from the blob before we understood what it did, and it
      has questionable utility: there's nothing in the GL, Vulkan, or D3D11
      specs that require the result be clamped to the underlying range to
      account for imprecision. And it doesn't make sense at all for cubic
      filtering, because the result can legitimately be outside the range in
      some scenarios. Just remove it.
      This fixes a bunch of tests added in vulkan CTS 1.2.8 to test blitting
      from compressed textures, which use random inputs and therefore are more
      likely to hit the out-of-range condition. For example,
  2. 10 Jan, 2022 2 commits
  3. 28 Dec, 2021 1 commit
  4. 11 Nov, 2021 2 commits
  5. 22 Oct, 2021 2 commits
  6. 21 Oct, 2021 5 commits
  7. 18 Oct, 2021 4 commits
  8. 13 Oct, 2021 1 commit
    • Hyunjun Ko's avatar
      turnip: enable VK_EXT_line_rasterization · 54221167
      Hyunjun Ko authored
      when lineRasterizationMode is VK_LINE_RASTERIZATION_MODE_BRESENHAM_EXT
      and primtype is line - we enable bresenham line mode.
      We have to disable MSAA when bresenham lines are used, this is
      a hardware limitation and spec allows it:
        "When Bresenham lines are being rasterized, sample locations may
         all be treated as being at the pixel center (this may affect
         attribute and depth interpolation)."
      This forces us to re-emit msaa state when line mode is changed.
      Signed-off-by: Hyunjun Ko's avatarHyunjun Ko <zzoon@igalia.com>
      Signed-off-by: Danylo Piliaiev's avatarDanylo Piliaiev <dpiliaiev@igalia.com>
      Part-of: <mesa/mesa!6020>
  9. 08 Oct, 2021 2 commits
    • Connor Abbott's avatar
      tu: Implement VK_KHR_imageless_framebuffer · 45378143
      Connor Abbott authored
      This is mostly a matter of auditing uses of
      cmd->state.framebuffer and replacing every use of fb->attachments with
      cmd->state.attachments. We already weren't using the attachments
      anywhere outside of the render pass, so this is pretty straightforward.
      We also don't have any use for anything in
      VkFramebufferAttachmentImageInfo so we can just ignore it.
      Part-of: <mesa/mesa!13228>
    • Connor Abbott's avatar
      tu/clear_blit: Constify some image views · c5b64dfb
      Connor Abbott authored
      I wanted cmd->state.attachments to contain const pointers, since we
      can't change the image view, but a few places were still not yet
      Part-of: <mesa/mesa!13228>
  10. 22 Sep, 2021 1 commit
  11. 10 Sep, 2021 3 commits
  12. 20 Aug, 2021 2 commits
    • Connor Abbott's avatar
      tu: Add a650-specific CCU flush workaround · 47996b95
      Connor Abbott authored
      Part-of: <mesa/mesa!12475>
    • Connor Abbott's avatar
      tu: Properly handle waiting on an earlier pipeline stage · abf0ae01
      Connor Abbott authored
      I never really implemented this properly, because I wasn't aware of the
      clusters when doing the original pipeline barrier implementation. It
      turns out that the Vulkan stages we get as part of the barriers are
      actually good for something, because it turns out that the pipeline
      state is split into stages, so earlier stages can run ahead of later
      stages and sometimes we need to wait when an earlier stage depends on
      the result of a later stage. This happens most often whenever a shader
      reads the result of a color/depth attachment write, because attachment
      writes happen in a logically later stage. However this could also happen
      for a FS -> VS dependency.
      Part-of: <mesa/mesa!12475>
  13. 19 Aug, 2021 1 commit
  14. 16 Aug, 2021 1 commit
  15. 02 Aug, 2021 1 commit
  16. 29 Jul, 2021 2 commits
    • Connor Abbott's avatar
      tu: Handle multisample vkCmdCopyColorImage() · d9a4a0ae
      Connor Abbott authored
      There was a bit of code already to select the 3d path, but we actually
      need another shader variant for it.
      Part-of: <mesa/mesa!12080>
    • Connor Abbott's avatar
      tu: Use NIR for clear/blit shaders · fc0c0e9d
      Connor Abbott authored
      This is much more maintainable, extensible, and easy to read than
      hand-rolled structs approximating assembly. This also removes the last
      use of the old hand-written packing structs. There are a few minor
      - The shaders are larger because ir3 currently doesn't support (rpt),
        which means that some shaders are larger than one instrlen and the
        current logic has to be extended to allow for that. This seems a small
        price to pay, ir3 will gain support for (rpt) eventually, and we
        shouldn't have limitations like this baked in anyway. For example some
        GL blob r8g8 <-> r16 copy shaders are apparently quite large.
      - Due to the inability to switch inputs/outputs on the fly, we need to
        split the VS into two variants. I made the layer-writing variant also
        used for other clears, because the old method of overloading c0.z/c1.z
        to mean both "src x coordinate" and "z clear value" in the same shader
        seemed too clever and I didn't want to add yet another variant. This
        means that non-layered clears will also write the layer (to 0), but
        that shouldn't be a big deal performance-wise.
      Part-of: <mesa/mesa!12079>
  17. 14 Jul, 2021 3 commits
  18. 13 Jul, 2021 1 commit
    • Rob Clark's avatar
      turnip: Split tu6_emit_xs() · 4e802538
      Rob Clark authored
      Emit all the state layout config (such as push-const CONSTLEN) first,
      before emitting anything that depends on that state.  This fixes an
      issue that was showing up when FLUT is enabled in ir3 (which results
      in higher probability of not having any immediats lowered to push-
      Signed-off-by: Rob Clark's avatarRob Clark <robdclark@chromium.org>
      Part-of: <!8705>
  19. 12 Jul, 2021 1 commit
  20. 14 Jun, 2021 1 commit
  21. 27 May, 2021 2 commits
  22. 11 May, 2021 1 commit