- 02 May, 2021 19 commits
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Lionel Landwerlin authored
Available on Gen11+. v2: Order shading rate in correct order (Samuel) v3: Move CPS_STATE emission to genX_state.c v4: Don't override various output structures (Jason) v5: Rebase on top master (Lionel) v6: Fix invalid VkPhysicalDeviceFragmentShadingRatePropertiesKHR (min|max)FragmentShadingRateAttachmentTexelSize values (Ken) Drop #endif comment v7: Limit extension to Gfx11+ (Lionel) Support conservative raster (Lionel) Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Jason Ekstrand authored
Those helpers exist primarily to sort out some of the weirdness around Gen4-6 dataport access. On Gen5 and earlier, everything was called "dataport" and, instead of the SFID we have today there was a "target cache" parameter in the descriptor. There are also some bits that moved around on various gens depending on read vs. write. Starting with Gen6, most things which target one of the data cache SFIDs should use brw_dp_desc() instead. v2: Drop backward comment (Ken) Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Jason Ekstrand authored
It's a Gen6 XFB thing. It's never used for anything else so there's no point in having a target cache switch. Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Lionel Landwerlin authored
v2: Update to BITSET_TEST() Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Lionel Landwerlin authored
Gfx12.5 has a slightly different code path. v2: Document the oddness Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Lionel Landwerlin authored
v2: Drop new internal opcodes (Jason) Simplify code (Jason) v3: Add Z computation for coarse pixels v4: Document things a little Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Lionel Landwerlin authored
v2: Drop old register type initializers (Jason) Simplify instruction snippet (Jason) Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Lionel Landwerlin authored
v2: Use the new inst->ex_desc field (Jason) v3: Drop CPS LoD compensation from sampler messages (Lionel) v4: Drop useless uses_rate_shading (Ken) Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Lionel Landwerlin authored
v2: Use new RT descriptor helper Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Lionel Landwerlin authored
Render target message descriptors are slightly different from the dataport ones. In particular the msg_type field is on bits 14:17 for RT while bits 14:18 for DP. v2: Drop unused send_commit_msg field in brw_fb_write_desc() (Ken) v3: Rebase on top renaming (Lionel) Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Suggested-by:
Jason Ekstrand <jason@jlekstrand.net> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Lionel Landwerlin authored
Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Lionel Landwerlin authored
Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Lionel Landwerlin authored
v2: Add Gen12.5 Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Lionel Landwerlin authored
Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> Part-of: <mesa/mesa!7455>
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Rob Clark authored
Grabbing the fence value in fd_fence_repopulate() without waiting on fd_submit_fence::ready doesn't work with async flushes, since we are waiting for the first flush to complete (ie. we don't have the kernel- side fence value yet). Just simplify it and make the "repopulated" fence delagate to the original fence. Fixes: e9a9ac6f ("freedreno/drm: Async submit support") Closes: mesa/mesa#4726 Signed-off-by:
Rob Clark <robdclark@chromium.org> Part-of: <mesa/mesa!10567>
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Rob Clark authored
Don't rely on getting a zero'd out buffer, we could hit the bo-cache. Fixes: 7dabd624 ("freedreno/drm: Userspace fences") Signed-off-by:
Rob Clark <robdclark@chromium.org> Part-of: <mesa/mesa!10567>
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Vasily Khoruzhick authored
Overwriting entire resource multiple times indicates streaming and in this case it's more efficient to use linear layout to avoid expensive linear->tiled conversions. Reviewed-by:
Erico Nunes <nunes.erico@gmail.com> Signed-off-by:
Vasily Khoruzhick <anarsoul@gmail.com> Part-of: <mesa/mesa!10572>
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Vinson Lee authored
In file included from ../src/glx/apple/apple_glx_context.c:49: ../src/glx/glxclient.h:56:10: fatal error: 'loader.h' file not found ^~~~~~~~~~ Fixes: 1cb664c1 ("glx: s/dri_message/glx_message/") Closes: mesa/mesa#4702 Signed-off-by:
Vinson Lee <vlee@freedesktop.org> Part-of: <mesa/mesa!10568>
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Bastian Beranek authored
Since commit f39fd3dc a new GLX error is issued in case context creation fails. This broke wine on certain hardware: While wine installs an error handler to ignore this kind of error, it does not function because it expects the dpy->request serial number of the error to be incremented since the installation of the handler. Workaround this by artificially increasing the request number. This also guarantees a unique serial number for the error. Fixes: f39fd3dc Closes: mesa/mesa#3969 Signed-off-by:
Bastian Beranek <bastian.beischer@rwth-aachen.de> Part-of: <mesa/mesa!10565>
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- 01 May, 2021 21 commits
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Ilia Mirkin authored
There's no hardware support for anything indirect, so just read the parameters out. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by:
Karol Herbst <kherbst@redhat.com> Reviewed-by:
Pierre Moreau <dev@pmoreau.org> Part-of: <mesa/mesa!10164>
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Ilia Mirkin authored
This requires an address that's safe to read from. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Part-of: <mesa/mesa!10164>
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Ilia Mirkin authored
This allows us to use up to 15 images or buffers (but not both). GL supports the concept of combined resource maximums though. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Acked-by:
Pierre Moreau <dev@pmoreau.org> Part-of: <mesa/mesa!10164>
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Ilia Mirkin authored
This is a purely software counter alongside the other hardware counters for ease of use and consistency. However we have to make room for it in the allocated query space. Use this opportunity to make the nv50 queries work like the nvc0 ones in terms of space allocation. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by:
Pierre Moreau <dev@pmoreau.org> Part-of: <mesa/mesa!10164>
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Ilia Mirkin authored
This is best-effort for pre-nva0 ... works with a single invocation, i.e. no locking. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Acked-by:
Pierre Moreau <dev@pmoreau.org> Part-of: <mesa/mesa!10164>
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Ilia Mirkin authored
This handles BUFQ, SUQ, as well as all the various texture types and formats, driven by data supplied by the driver (and shader itself). TODO: - 2d linear surfaces - format via key for writeonly These will be included in a later change. ES3.1 doesn't require writeonly, and it's very hard to generate a 2d linear surface. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Acked-by:
Pierre Moreau <dev@pmoreau.org> Part-of: <mesa/mesa!10164>
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Ilia Mirkin authored
These are needed to implement things like imageSize() as well as feed data into lowering logic for various access types not handled by the hardware. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by:
Pierre Moreau <dev@pmoreau.org> Part-of: <mesa/mesa!10164>
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Ilia Mirkin authored
Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by:
Karol Herbst <kherbst@redhat.com> Reviewed-by:
Pierre Moreau <dev@pmoreau.org> Part-of: <mesa/mesa!10164>
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Ilia Mirkin authored
Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by:
Pierre Moreau <dev@pmoreau.org> Part-of: <mesa/mesa!10164>
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Ilia Mirkin authored
Otherwise the final argument doesn't get emitted for CAS in the nv50 emitter. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by:
Karol Herbst <kherbst@redhat.com> Reviewed-by:
Pierre Moreau <dev@pmoreau.org> Part-of: <mesa/mesa!10164>
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Ilia Mirkin authored
Evidence suggests that having it anywhere, even as a regular e.g. atom argument, causes issues. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by:
Karol Herbst <kherbst@redhat.com> Acked-by:
Pierre Moreau <dev@pmoreau.org> Part-of: <mesa/mesa!10164>
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Ilia Mirkin authored
Note that shared memory loads can actually do offsets. The restrictions vary by generation, this will be added in a later change. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by:
Karol Herbst <kherbst@redhat.com> Reviewed-by:
Pierre Moreau <dev@pmoreau.org> Part-of: <mesa/mesa!10164>
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Ilia Mirkin authored
Ideally this should include the size of the inputs as well. This will be updated when we add support for kernels which take actual inputs. Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by:
Karol Herbst <kherbst@redhat.com> Reviewed-by:
Pierre Moreau <dev@pmoreau.org> Part-of: <mesa/mesa!10164>
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Marek Olšák authored
Let's use the 4 bytes of unused padding usefully in pipe_transfer. Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <mesa/mesa!10527>
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Marek Olšák authored
Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <mesa/mesa!10527>
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Marek Olšák authored
We could change the type into 16 bits if needed. PB_USAGE flags need to match PIPE_MAP flags due to static assertions. Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <mesa/mesa!10527>
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Rob Clark authored
Add spec@arb_pixel_buffer_object@texsubimage cube_map_array pbo to a530 fails for the same reason as spec@arb_texture_cube_map_array@texsubimage cube_map_array (it is sometimes triggering gpu hangs that cause other flakes). And remove two a630 xfails that started showing up as UnexpectedPass. Signed-off-by:
Rob Clark <robdclark@chromium.org> Part-of: <mesa/mesa!10530>
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Rob Clark authored
This one has shown up a couple times since fd/go-fast, I'm still trying to reproduce/debug. Signed-off-by:
Rob Clark <robdclark@chromium.org> Part-of: <mesa/mesa!10530>
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Rob Clark authored
pctx->flush_resource() has the same expectations that the resource can be shared with an external client as pctx->flush(), but without the convenience of a fence to know *when* the resource must be visible to that external client. So we need to ensure the batch is flushed all the way to the kernel so that implicit-sync can do it's job. Fixes: e9a9ac6f ("freedreno/drm: Async submit support") Signed-off-by:
Rob Clark <robdclark@chromium.org> Part-of: <mesa/mesa!10530>
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Rob Clark authored
This provides the upper layer (gallium, etc) a way to ensure that rendering involving the bo has been flushed all the way to the kernel. Signed-off-by:
Rob Clark <robdclark@chromium.org> Part-of: <mesa/mesa!10530>
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Rob Clark authored
Looks like this was unused, and only served to segfault when unbinding textures. Signed-off-by:
Rob Clark <robdclark@chromium.org> Part-of: <mesa/mesa!10530>
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