This is covered by the two previous similar asserts.  Each time `v` is
assigned this is asserted.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <mesa/mesa!5213>

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <mesa/mesa!5213>

After 2663759a

 ("intel/fs: Add and use a new load_simd_width_intel
intrinsic") the local_workgroup_size is not used anymore except for
assertions at the pass' start, so drop it from state struct.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <mesa/mesa!5213>

The nir_intrinsic_load_simd_width_intel is always lowered by the
brw_nir_lower_simd() pass before the emission happens.  This is likely
a "leftover" from patch rewriting/squashing that happened when this
intrinsic was added.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <mesa/mesa!5213>

src/egl/drivers/dri2/platform_android.c:332:29: warning: unused
variable 'dri2_dpy' [-Wunused-variable]
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <mesa/mesa!5174>

src/egl/drivers/dri2/platform_android.c:159:12: warning: unused
function 'get_format' [-Wunused-function]
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <mesa/mesa!5174>

This is a non-stop source of warnings and build breakage. memset works
everywhere.

src/mesa/state_tracker/st_tgsi_lower_depth_clamp.c:354:45: warning:
suggest braces around initialization of subobject [-Wmissing-braces]
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <mesa/mesa!5174>

safe_mul may not be used and clang doesn't understand the "optimize"
attribute.

src/mapi/glapi/gen/marshal_generated0.c:1216:16: warning: unknown
attribute 'optimize' ignored [-Wunknown-attributes]

src/mapi/glapi/gen/marshal_generated0.c:36:19: warning: unused
function 'safe_mul' [-Wunused-function]
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <mesa/mesa!5174>

Silence the warning about this always-true comparison.

src/util/softfloat.c:214:42: warning: comparison of constant 32768
with expression of type 'int16_t' (aka 'short') is always false
[-Wtautological-constant-out-of-range-compare]
        } else if ((e > 0x1d) || (0x8000 <= m)) {
                                  ~~~~~~ ^  ~
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <mesa/mesa!5174>

First element is not a scalar.  Just initialize the struct like we do
elsewhere.

src/freedreno/ir3/disasm-a3xx.c:958:33: warning: suggest braces around
initialization of subobject [-Wmissing-braces]
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5174>

We're already using the {} syntax elsewhere in turnip.

src/freedreno/vulkan/tu_formats.c:828:71: warning: suggest braces
around initialization of subobject [-Wmissing-braces]
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5174>

This makes it a little more explicit that the values line up.

src/freedreno/vulkan/tu_device.c:2209:75: warning: implicit conversion
from enumeration type 'const VkSamplerReductionMode' (aka 'const enum
VkSamplerReductionMode') to different enumeration type 'enum
a6xx_reduction_mode' [-Wenum-conversion]
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5174>

We're hard-coding this value, so let's use the hw enum and avoid a
warning.

src/freedreno/vulkan/tu_clear_blit.c:2091:19: warning: implicit
conversion from enumeration type 'enum VkStencilOp' to different
enumeration type 'enum adreno_stencil_op' [-Wenum-conversion]
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5174>

Gets the `nbins_x`/`y` local vars out of the main layout function,
to prevent any confusion like what was fixed in the previous patch
from sneaking back in.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5189>

`layout_gmem()` recalculates the # of bins in x/y dimensions after
aligning the bin width/height to required dimensions.  Because of this,
the resulting gmem config could have fewer bins in either dimension.
But the tile/bin layout and the pipe assignment logic were still using
the original values.  Which could result in extraneous bins with a
width and/or height of zero.

Because the gmem rendering code uses `gmem->bin_w`/`h` to determine
the number of bins, this could result in some zero size bins being
executed, while later valid bins are skipped.  Which can leave un-
rendered portions of the screen (generally lower-right).

To fix this, be sure to use `gmem->bin_w`/`h` rather than the local
variables.

Fixes: 1bd38746

 ("freedreno/gmem: rework gmem layout algo")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5189>

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5189>

And real getopt arg parsing.. now that we have one.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5189>

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5189>

`gmem_page_align` is generation specific (with the exception of a2xx
which has a different value for fast-clear).  So we should override the
value from the captured gmem_key according to the gpu we are emulating
for the purposes of calculating gmem config.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5189>

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5188>

Just something I noticed in the process of debugging the issue fixed in
the previous commit.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5188>

The resource tracking in the clear/draw_vbo/blit paths could itself
trigger a flush.  Which would update last_fence.  So we need to clear
last_fence *after* all the dependency tracking.

Fixes: ddb7fada ("freedreno: avoid no-op flushes by re-using last-fence")
Closes: mesa/mesa#2992

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5188>

Something I cooked up in the process of debugging the issue fixed in the
next commit.  Might come in useful again in the future.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <mesa/mesa!5188>

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: 18ed82b0
   ('nir: Add a pass for selectively lowering variables to scratch space')

Part-of: <mesa/mesa!5214>

This adds RB, VFMT and TFMT NONE values for a3xx-a5xx and FMT6_NONE
for a6xx.  Use those values instead of open coded (enum xxx) ~0 or
sometimes even ~0, which triggers out-of-enum range warnings.

Part-of: <mesa/mesa!5173>

The closed GL driver uses resinfo on images with the writeonly flag (using
the texture-path's getsize only for readonly images).  The closed vulkan
driver seems to use resinfo regardless.  Using resinfo doesn't need any
fixups after the instruction.  It also avoids one of the needs for the
TEX_CONST state for the image, which is awkward to set up in the GL
driver.

The new handler goes into ir3_a6xx to be next to the other current image
code, but the a4xx version is left in place because it wants a bunch of
sampler helpers.

Fixes assertion failure in dEQP-VK.image.image_size.buffer.readonly_32.

Part-of: <mesa/mesa!3501>

There was an open coded version for ldc, and now we can drop that.  I
needed to do it for resinfo as well.

Part-of: <mesa/mesa!3501>

All the users of the unsigned result just wanted an ir3_instruction to
reference.  Move a6xx's helpers to ir3_image.c and inline the old unsigned
results version.

Part-of: <mesa/mesa!3501>

Noticed comparing our RESINFO asm to qcom's for the same test, and if I
drop this bit their disasm switches from immediate to reg.  ldgb seems to
have the same behavior.

Part-of: <mesa/mesa!3501>

In the process, clarify what's going on with the LDC/LDIB case.

Part-of: <mesa/mesa!3501>

Since I'm going to start using the resinfo opcode, make sure we can disasm
the blob's instances of it that I've found.  And, since resinfo disasm
will impact ldgb on pre-a6xx, include some of those too.

Part-of: <mesa/mesa!3501>

Compare to QC's disasm right next to ours, and we clearly had an extra src
that wouldn't make sense.

Part-of: <mesa/mesa!3501>

We were using the size of the underlying buffer (in R8 elements), while we
need to be using the size of the image view (which may be a subset of the
underlying buffer, and may be in a different format from R8).

This fix means less dereferencing off of the end of shader image views for
buffer images, but more importantly is needed to get the right answer from
resinfo if we are to switch to that.

Part-of: <mesa/mesa!3501>

Part-of: <mesa/mesa!5122>

This came up with some image tests that are enabled by the next commit.

Part-of: <mesa/mesa!5122>

They act the same as 2D arrays when used as storage images, and we're
supposed to override the IBO descriptor to reflect this.

Part-of: <mesa/mesa!5122>

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <mesa/mesa!5133>

All those cases are supposed to hit an assert in ir_binop_bit_or case.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <mesa/mesa!5133>

PAL has all of them.

GE perf counters don't work - no idea why.
I only tested the few that I like to use.

There is no documentation, though most of the enums had already been
in the headers.
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <mesa/mesa!5184>

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <mesa/mesa!5184>