- 29 Jul, 2021 40 commits
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Logic is lifted from bi_layout.c, adapted to work on instructions (not clauses) and for Valhall's off-by-one semantic which is annoyingly different than Bifrost. (But the same as Midgard -- Bifrost was annoyingly different than Midgard!) Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Implicit on Bifrost. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
We should really extend the IR. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Valhall removes certain instructions from Bifrost, requiring a canonical lowering. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Valhall has a lookup table for common constants. Add a pass to take advantage of it, lowering away immediate indices. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
These are pre-conditions required for packing. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Yo, I heard you like tests. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
This handles enough for basic compute shaders to compile. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Used to determine the instruction's action. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Just NOP everything out for now. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Annoyingly different from Bifrost. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Filled out the new structures from XML. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Specify gpu id with --gpu-id or marketing name with --gpu. Still have compile/disasm as commands, but allow -v for verbose printing. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Alyssa Rosenzweig authored
I want to test SSBOs with the standalone compiler while retaining full support for mediump qualifiers. v2: Actually test SSBOs on compute shaders. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com>
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Lionel Landwerlin authored
If we have 2 command buffers back to back, one with a query pool, one without, we don't want to retain the second query pool value (NULL). Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 0a7224f3 ("anv: group as many command buffers into a single execbuf") Reviewed-by:
Tapani Pälli <tapani.palli@intel.com> Part-of: <mesa/mesa!12107>
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Liam White authored
This avoids a deadlock condition when registered atexit handlers attempt to acquire a mutex, but the program was going to exit with an error anyway Reviewed-by:
Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by:
Rohan Garg <rohan.garg@collabora.com> Part-of: <mesa/mesa!11813>
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Rohan Garg authored
This helps ensure we're not doing out of bounds access later. Signed-off-by:
Rohan Garg <rohan.garg@collabora.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <mesa/mesa!12075>
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Rohan Garg authored
Signed-off-by:
Rohan Garg <rohan.garg@collabora.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Part-of: <mesa/mesa!12085>
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Erik Faye-Lund authored
These were fixed previously, but due to the CI not really running all tests any more, I didn't notice these fixes. Let's bring the expected results up to date. Fixes: 2e29857b ("llvmpipe: only report supported shader-image formats") Reviewed-by:
Emma Anholt <emma@anholt.net> Part-of: <mesa/mesa!12077>
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Juan A. Suárez authored
No need to build the simulator with NEON; and also v3dv3 simulator is not for VC4, so don't inherit v3dv3 requirement when building vc4 driver. Fixes: #5126 Fixes: d198e26a ("broadcom/common: move v3d_tiling to common") Reviewed-by:
Alejandro Piñeiro <apinheiro@igalia.com> Signed-off-by:
Juan A. Suarez Romero <jasuarez@igalia.com> Part-of: <!12078>
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Alejandro Piñeiro authored
This allows the variables decorated with RelaxedPrecision to have the proper precision. It is worth to note that the decorator can be applied on other cases, but those would be handled on the future. Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Reviewed-by:
Iago Toral Quiroga <itoral@igalia.com> Part-of: <mesa/mesa!7614>
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Alejandro Piñeiro authored
All vulkan drivers have been copying anv's code to convert VkSpecializationInfo into nir_spirv_specialization. Recently there was a Vulkan spec change on allowed values for VkSpecializationInfo, and all drivers got affected. This commits creates a new helper, and uses it on all Vulkan Mesa drivers. v2: use (uint8_t*) castings, instead of void*, to avoid C2036 with MSVC (detected by the CI, inspired on what radv was doing) Reviewed-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> Reviewed-by:
Samuel Iglesias Gonsálvez <siglesias@igalia.com> Reviewed-by:
Boris Brezillon <boris.brezillon@collabora.com> Reviewed-By:
Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Reviewed-by:
Juan A. Suarez <jasuarez@igalia.com> Part-of: <!12047>
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Enrico Galli authored
Reviewed-by:
Jesse Natalie <jenatali@microsoft.com> Part-of: <mesa/mesa!12119>
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Enrico Galli authored
Reviewed-by:
Jesse Natalie <jenatali@microsoft.com> Part-of: <mesa/mesa!12119>
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Enrico Galli authored
Reviewed-by:
Jesse Natalie <jenatali@microsoft.com> Part-of: <mesa/mesa!12119>
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Alyssa Rosenzweig authored
Fragment isn't last for GLSL stages, compute is. Signed-off-by:
Alyssa Rosenzweig <alyssa@collabora.com> Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Part-of: <!12082>
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Mike Blumenkrantz authored
Part-of: <mesa/mesa!12071>
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Mike Blumenkrantz authored
this uses a singly-linked list of timeline ids to compare against the device queue's cmdbuf counter and determine which timeline id maps to which cmdbuf and thus which fence can be waited on Reviewed-by:
Dave Airlie <airlied@redhat.com> Part-of: <mesa/mesa!12071>
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