pan/va: Identify mux condition

First noticed in a cube map shader from the DDK, guessed by analogy to
Bifrost, confirmed with computerator.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>

src/panfrost/bifrost/valhall/ISA.xml

@@ -576,6 +576,20 @@
     <value name="0x7C007C00">v2inf</value>
   </enum>
 
+  <enum name="Mux">
+    <desc>
+      Condition to use for a `MUX` instruction. `neg` checks the sign bit,
+      `int_zero` compares to `0x00000000`, `fp_zero` compares to $\pm 0.0$ as
+      an IEEE 754 float, and `bit` checks each bit separately. The `bit` mode
+      acts like an imaginary `CSEL.v32i1` instruction, and implements
+      `bitselect()` in OpenCL.
+    </desc>
+    <value desc="Negative">neg</value>
+    <value desc="Integer zero" default="true">int_zero</value>
+    <value desc="Floating point zero">fp_zero</value>
+    <value desc="Bitwise">bit</value>
+  </enum>
+
   <ins name="NOP" title="No operation" dests="0" opcode="0x00" unit="CVT">
     <desc>
       Do nothing. Useful at the start of a block for waiting on slots required
@@ -1429,11 +1443,14 @@
   </group>
 
   <ins name="MUX.i32" title="Mux" dests="1" opcode="0xB8" unit="SFU">
-    <!-- TODO: mode is at 32:33 -->
     <desc>
-      Mux between A and B based on the provided mask. Equivalent to
-      `bitselect()` in OpenCL. `(A &amp; mask) | (A &amp; ~mask)`
+      Mux between A and B based on the provided mask. The condition specified
+      as the `mux` modifier is evaluated on the mask. If true, `A` is chosen,
+      else `B` is chosen. The `bit` modifier acts bitwise, equivalent to
+      `bitselect()` in OpenCL, so `MUX.i32.bit A, B, mask` calculates
+      `(A &amp; mask) | (A &amp; ~mask)`.
     </desc>
+    <mod name="mux" start="32" size="2"/>
     <src>A</src>
     <src>B</src>
     <src>Mask</src>

src/panfrost/bifrost/valhall/test/assembler-cases.txt

@@ -107,3 +107,7 @@ c0 01 00 00 00 c4 10 51    IADD_IMM.i32.reconverge r4, 0x0, #0x1
 42 00 00 38 08 44 61 00    STORE.i128.slot0 @r4:r5:r6:r7, `r2, offset:0
 41 f8 ff ff 07 c0 1f 50    BRANCHZ.reconverge `r1, offset:-8
 40 00 00 00 c0 c0 9c 40    FRCP.f32.wait0126 r0, `r0.neg.abs
+40 44 80 00 00 c0 b8 00    MUX.i32.neg r0, `r0, `r4, u0
+40 44 80 00 01 c0 b8 00    MUX.i32 r0, `r0, `r4, u0
+40 44 80 00 02 c0 b8 00    MUX.i32.fp_zero r0, `r0, `r4, u0
+40 44 80 00 03 c0 b8 00    MUX.i32.bit r0, `r0, `r4, u0