Commit 0cbb8d38 authored by agd5f's avatar agd5f
Browse files

- Add check to make sure there is enough ram for 3D with the mode/depth

- remove old DDC code
- few minor cleanups
parent 4579717c
......@@ -1255,7 +1255,7 @@ SavageInitAccel(ScreenPtr pScreen)
pScrn->bitsPerPixel,
widthBytes,bufferSize);
pSAVAGEDRIServer->frontOffset = 0;
pSAVAGEDRIServer->frontOffset = 0; /* AGD: should probably be pScrn->fbOffset */
pSAVAGEDRIServer->frontPitch = widthBytes;
/* Try for front, back, depth, and two framebuffers worth of
......
......@@ -81,6 +81,7 @@ static unsigned int SavageDDC1Read(ScrnInfoPtr pScrn);
static void SavageProbeDDC(ScrnInfoPtr pScrn, int index);
static void SavageGetTvMaxSize(SavagePtr psav);
static Bool SavagePanningCheck(ScrnInfoPtr pScrn);
static Bool SavageCheckAvailableRamFor3D(ScrnInfoPtr pScrn);
extern ScrnInfoPtr gpScrn;
......@@ -2054,11 +2055,11 @@ static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr,
VGAOUT8(vgaCRIndex, 0x50);
VGAOUT8(vgaCRReg, VGAIN8(vgaCRReg) | 0xC1);
#if 0
width = (pScrn->displayWidth * (pScrn->bitsPerPixel / 8)) >> 3;
VGAOUT16(vgaCRIndex, ((width & 0xff) << 8) | 0x13 );
VGAOUT16(vgaCRIndex, ((width & 0x300) << 4) | 0x51 );
#endif
/* Some non-S3 BIOSes enable block write even on non-SGRAM devices. */
switch( psav->Chipset )
......@@ -2493,6 +2494,46 @@ static void SavageUnmapMem(ScrnInfoPtr pScrn, int All)
return;
}
static Bool SavageCheckAvailableRamFor3D(ScrnInfoPtr pScrn)
{
SavagePtr psav = SAVPTR(pScrn);
int cpp = pScrn->bitsPerPixel / 8;
/*int widthBytes = pScrn->displayWidth * cpp;*/
int widthBytes = psav->lDelta;
/*int widthBytes = psav->l3DDelta;*/
int bufferSize = ((pScrn->virtualY * widthBytes + SAVAGE_BUFFER_ALIGN)
& ~SAVAGE_BUFFER_ALIGN);
int tiledwidthBytes, tiledBufferSize, RamNeededFor3D;
/*tiledwidthBytes = psav->lDelta;*/
tiledwidthBytes = psav->l3DDelta;
if (cpp == 2) {
tiledBufferSize = ((pScrn->virtualX+63)/64)*((pScrn->virtualY+15)/16) * 2048;
} else {
tiledBufferSize = ((pScrn->virtualX+31)/32)*((pScrn->virtualY+15)/16) * 2048;
}
RamNeededFor3D = 4096 + /* hw cursor*/
psav->cobSize + /*COB*/
bufferSize + /* front buffer */
tiledBufferSize + /* back buffer */
tiledBufferSize; /* depth buffer */
xf86DrvMsg(pScrn->scrnIndex,X_INFO,
"%d kB of Videoram needed for 3D; %d kB of Videoram available\n",
RamNeededFor3D/1024, psav->videoRambytes/1024);
if (RamNeededFor3D <= psav->videoRambytes) {
xf86DrvMsg(pScrn->scrnIndex,X_INFO,"Sufficient Videoram available for 3D\n");
return TRUE;
} else {
xf86DrvMsg(pScrn->scrnIndex,X_ERROR,"Insufficient Videoram available for 3D\n");
xf86DrvMsg(pScrn->scrnIndex,X_ERROR,"Try a lower color depth or smaller desktop.\n");
xf86DrvMsg(pScrn->scrnIndex,X_ERROR,
"For integrated savages try increasing the videoram in the BIOS.\n");
return FALSE;
}
}
static Bool SavageScreenInit(int scrnIndex, ScreenPtr pScreen,
int argc, char **argv)
......@@ -2552,7 +2593,8 @@ static Bool SavageScreenInit(int scrnIndex, ScreenPtr pScreen,
|| (psav->Chipset == S3_SAVAGE3D)
|| (psav->Chipset == S3_SUPERSAVAGE)
|| (psav->Chipset == S3_PROSAVAGEDDR))
&& (!psav->shadowFB)) {
&& (!psav->NoAccel)
&& (SavageCheckAvailableRamFor3D(pScrn))) {
/* Setup DRI after visuals have been established */
psav->directRenderingEnabled = SAVAGEDRIScreenInit(pScreen);
} else
......@@ -3161,7 +3203,9 @@ static Bool SavageCloseScreen(int scrnIndex, ScreenPtr pScreen)
static Bool SavageSaveScreen(ScreenPtr pScreen, int mode)
{
#if 0
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
#endif
TRACE(("SavageSaveScreen(0x%x)\n", mode));
#if 0
if( pScrn->vtSema && SAVPTR(pScrn)->hwcursor )
......@@ -3581,7 +3625,7 @@ static void SavageDPMS(ScrnInfoPtr pScrn, int mode, int flags)
if ( (!psav->CrtOnly) && psav->UseBIOS && psav->PanelX ) {
SavageSetPanelEnabled(psav, (mode == DPMSModeOn));
}
else if (psav->PanelX) {
else if ((!psav->CrtOnly) && psav->PanelX) {
switch (mode) {
case DPMSModeOn:
VGAOUT8(0x3c4, 0x31); /* SR31 bit 4 - FP enable */
......@@ -3655,58 +3699,6 @@ SavageDDC1(int scrnIndex)
return TRUE;
}
#if 0 /* tim's code */
static unsigned int
SavageDDC1Read(ScrnInfoPtr pScrn)
{
register vgaHWPtr hwp = VGAHWPTR(pScrn);
register unsigned char tmp;
SavagePtr psav = SAVPTR(pScrn);
VerticalRetraceWait();
InI2CREG(psav,tmp);
while (hwp->readST01(hwp)&0x8) {};
while (!(hwp->readST01(hwp)&0x8)) {};
return ((unsigned int) (tmp & 0x08));
}
static Bool
SavageDDC1(int scrnIndex)
{
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
SavagePtr psav = SAVPTR(pScrn);
unsigned char tmp;
Bool success = FALSE;
xf86MonPtr pMon;
/* initialize chipset */
InI2CREG(psav,tmp);
OutI2CREG(psav,tmp | 0x12);
if ((pMon = xf86PrintEDID(
xf86DoEDID_DDC1(scrnIndex,vgaHWddc1SetSpeed,SavageDDC1Read))) != NULL)
success = TRUE;
xf86SetDDCproperties(pScrn,pMon);
/* undo initialization */
OutI2CREG(psav,tmp);
return success;
}
static void
SavageProbeDDC(ScrnInfoPtr pScrn, int index)
{
vbeInfoPtr pVbe;
if (xf86LoadSubModule(pScrn, "vbe")) {
pVbe = VBEInit(NULL,index);
ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
vbeFree(pVbe);
}
}
#endif /* tim's code */
static void
SavageGetTvMaxSize(SavagePtr psav)
{
......
......@@ -195,7 +195,7 @@ Bool SAVAGEInitMC(ScreenPtr pScreen)
if(pSAVAGE->hwmcSize == 0)
{
xf86DrvMsg(X_ERROR, pScrn->scrnIndex,
"SAVAGEInitMC: There is no enough memory!\n");
"SAVAGEInitMC: There is not enough memory!\n");
return FALSE;
}
......
......@@ -465,19 +465,6 @@ do { \
while ((VGAIN8(psav->vgaIOBase + 0x0a) & 0x08) == 0x00) ; \
} \
}
#define I2C_REG 0xa0
#define InI2CREG(psav,a) \
{ \
VGAOUT8(psav->vgaIOBase + 4, I2C_REG); \
a = VGAIN8(psav->vgaIOBase + 5); \
}
#define OutI2CREG(psav,a) \
{ \
VGAOUT8(psav->vgaIOBase + 4, I2C_REG); \
VGAOUT8(psav->vgaIOBase + 5, a); \
}
#endif /* tim's code */
#define HZEXP_COMP_1 0x54
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment