From cd237a2893f3dfc16f93254bc14d874d711ce304 Mon Sep 17 00:00:00 2001
From: Jimmy Kizito <Jimmy.Kizito@amd.com>
Date: Fri, 9 Apr 2021 22:23:53 -0400
Subject: [PATCH] drm/amd/display: Implement DPIA training loop
[Why]
Training of DPIA link differs enough from that of conventional
DP link to warrant a separate implementation.
[How]
- Implement top-level of DPIA training loop.
- Make functions shared between DP and DPIA link training "public".
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Wayne Lin <Wayne.Lin@amd.com>
Acked-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
---
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 17 ---
.../drm/amd/display/dc/core/dc_link_dpia.c | 109 ++++++++++++++++++
.../gpu/drm/amd/display/dc/inc/dc_link_dpia.h | 10 ++
drivers/gpu/drm/amd/display/dc/os_types.h | 1 +
4 files changed, 120 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index eb320790523e4..9b8fbf203a627 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2318,23 +2318,6 @@ enum link_training_result dc_link_dp_perform_link_training(
return status;
}
-/*
- * Train DP tunneling link for USB4 DPIA display endpoint.
- *
- * DPIA equivalent of dc_link_dp_perfrorm_link_training.
- */
-enum link_training_result dc_link_dpia_perform_link_training(struct dc_link *link,
- const struct dc_link_settings *link_setting,
- bool skip_video_pattern)
-{
- enum link_training_result status;
-
- /** @todo Always fail until USB4 DPIA training implemented. */
- status = LINK_TRAINING_CR_FAIL_LANE0;
-
- return status;
-}
-
bool perform_link_training_with_retries(
const struct dc_link_settings *link_setting,
bool skip_video_pattern,
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
index f11dc9e28d3ff..afb18cba3efa5 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c
@@ -24,12 +24,121 @@
*
*/
+#include "dc.h"
#include "dc_link_dpia.h"
#include "inc/core_status.h"
#include "dc_link.h"
+#include "dc_link_dp.h"
enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link)
{
/** @todo Read corresponding DPCD region and update link caps. */
return DC_OK;
}
+
+/* Configure link as prescribed in link_setting; set LTTPR mode; and
+ * Initialize link training settings.
+ */
+static enum link_training_result dpia_configure_link(struct dc_link *link,
+ const struct dc_link_settings *link_setting,
+ struct link_training_settings *lt_settings)
+{
+ enum link_training_result result;
+
+ /** @todo Fail until implemented. */
+ result = LINK_TRAINING_ABORT;
+
+ return result;
+}
+
+/* Execute clock recovery phase of link training for specified hop in display
+ * path.
+ */
+static enum link_training_result dpia_training_cr_phase(struct dc_link *link,
+ struct link_training_settings *lt_settings,
+ uint32_t hop)
+{
+ enum link_training_result result;
+
+ /** @todo Fail until implemented. */
+ result = LINK_TRAINING_ABORT;
+
+ return result;
+}
+
+/* Execute equalization phase of link training for specified hop in display
+ * path.
+ */
+static enum link_training_result dpia_training_eq_phase(struct dc_link *link,
+ struct link_training_settings *lt_settings,
+ uint32_t hop)
+{
+ enum link_training_result result;
+
+ /** @todo Fail until implemented. */
+ result = LINK_TRAINING_ABORT;
+
+ return result;
+}
+
+/* End training of specified hop in display path. */
+static enum link_training_result dpia_training_end(struct dc_link *link,
+ uint32_t hop)
+{
+ enum link_training_result result;
+
+ /** @todo Fail until implemented. */
+ result = LINK_TRAINING_ABORT;
+
+ return result;
+}
+
+enum link_training_result dc_link_dpia_perform_link_training(struct dc_link *link,
+ const struct dc_link_settings *link_setting,
+ bool skip_video_pattern)
+{
+ enum link_training_result result;
+ struct link_training_settings lt_settings;
+ uint8_t repeater_cnt = 0; /* Number of hops/repeaters in display path. */
+ uint8_t repeater_id; /* Current hop. */
+
+ /* Configure link as prescribed in link_setting and set LTTPR mode. */
+ result = dpia_configure_link(link, link_setting, <_settings);
+ if (result != LINK_TRAINING_SUCCESS)
+ return result;
+
+ if (link->lttpr_mode == LTTPR_MODE_NON_TRANSPARENT)
+ repeater_cnt = dp_convert_to_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
+
+ /* Train each hop in turn starting with the one closest to DPTX.
+ * In transparent or non-LTTPR mode, train only the final hop (DPRX).
+ */
+ for (repeater_id = repeater_cnt; repeater_id >= 0; repeater_id--) {
+ /* Clock recovery. */
+ result = dpia_training_cr_phase(link, <_settings, repeater_id);
+ if (result != LINK_TRAINING_SUCCESS)
+ break;
+
+ /* Equalization. */
+ result = dpia_training_eq_phase(link, <_settings, repeater_id);
+ if (result != LINK_TRAINING_SUCCESS)
+ break;
+
+ /* Stop training hop. */
+ result = dpia_training_end(link, repeater_id);
+ if (result != LINK_TRAINING_SUCCESS)
+ break;
+ }
+
+ /* Double-check link status if training successful; gracefully stop
+ * training of current hop if training failed for any reason other than
+ * sink unplug.
+ */
+ if (result == LINK_TRAINING_SUCCESS) {
+ msleep(5);
+ result = dp_check_link_loss_status(link, <_settings);
+ } else if (result != LINK_TRAINING_ABORT) {
+ dpia_training_end(link, repeater_id);
+ }
+ return result;
+}
diff --git a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h
index 0047058cf699d..fecb07b3314d6 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h
@@ -30,10 +30,20 @@
/* This module implements functionality for training DPIA links. */
struct dc_link;
+struct dc_link_settings;
/* Read tunneling device capability from DPCD and update link capability
* accordingly.
*/
enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link);
+/* Train DP tunneling link for USB4 DPIA display endpoint.
+ * DPIA equivalent of dc_link_dp_perfrorm_link_training.
+ * Aborts link training upon detection of sink unplug.
+ */
+enum link_training_result
+dc_link_dpia_perform_link_training(struct dc_link *link,
+ const struct dc_link_settings *link_setting,
+ bool skip_video_pattern);
+
#endif /* __DC_LINK_DPIA_H__ */
diff --git a/drivers/gpu/drm/amd/display/dc/os_types.h b/drivers/gpu/drm/amd/display/dc/os_types.h
index 34efb708ea12e..5df1d80c8341e 100644
--- a/drivers/gpu/drm/amd/display/dc/os_types.h
+++ b/drivers/gpu/drm/amd/display/dc/os_types.h
@@ -31,6 +31,7 @@
#include <linux/kref.h>
#include <linux/types.h>
#include <linux/slab.h>
+#include <linux/delay.h>
#include <asm/byteorder.h>
--
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