Commit 76387a3a authored by Nicholas Kazlauskas's avatar Nicholas Kazlauskas Committed by Alex Deucher
Browse files

drm/amd/display: Add DCN3.1 Resource



Container for hardware resources and blocks for DCN3.1, also adds
new DC debug flags used with DCN3.1.
Signed-off-by: Nicholas Kazlauskas's avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent bb820965
......@@ -58,6 +58,9 @@
#include "dcn301/dcn301_resource.h"
#include "dcn302/dcn302_resource.h"
#include "dcn303/dcn303_resource.h"
#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
#include "../dcn31/dcn31_resource.h"
#endif
#endif
#define DC_LOGGER_INIT(logger)
......@@ -139,6 +142,14 @@ enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
dc_version = DCN_VERSION_3_01;
break;
#endif
#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
case FAMILY_YELLOW_CARP:
if (ASICREV_IS_YELLOW_CARP(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_3_1;
break;
#endif
default:
dc_version = DCE_VERSION_UNKNOWN;
break;
......@@ -222,6 +233,11 @@ struct resource_pool *dc_create_resource_pool(struct dc *dc,
case DCN_VERSION_3_03:
res_pool = dcn303_create_resource_pool(init_data, dc);
break;
#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
case DCN_VERSION_3_1:
res_pool = dcn31_create_resource_pool(init_data, dc);
break;
#endif
#endif
default:
break;
......
......@@ -520,6 +520,9 @@ struct dc_debug_options {
unsigned int force_odm_combine; //bit vector based on otg inst
#if defined(CONFIG_DRM_AMD_DC_DCN)
unsigned int force_odm_combine_4to1; //bit vector based on otg inst
#endif
#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
bool disable_z9_mpc;
#endif
unsigned int force_fclk_khz;
bool enable_tri_buf;
......@@ -562,6 +565,10 @@ struct dc_debug_options {
bool force_enable_edp_fec;
/* FEC/PSR1 sequence enable delay in 100us */
uint8_t fec_enable_delay_in100us;
#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
bool disable_z10;
bool enable_sw_cntl_psr;
#endif
};
struct dc_debug_data {
......
This diff is collapsed.
/*
* Copyright 2020 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/
#ifndef _DCN31_RESOURCE_H_
#define _DCN31_RESOURCE_H_
#include "core_types.h"
#define TO_DCN31_RES_POOL(pool)\
container_of(pool, struct dcn31_resource_pool, base)
struct dcn31_resource_pool {
struct resource_pool base;
};
struct resource_pool *dcn31_create_resource_pool(
const struct dc_init_data *init_data,
struct dc *dc);
#endif /* _DCN31_RESOURCE_H_ */
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