Commit e3e47b35 authored by Adam Jackson's avatar Adam Jackson 🎧

Remove MAX_PCI_{BUSES,DOMAINS} and some associated #if 0.

parent 593144dd
......@@ -138,19 +138,16 @@
/* Global data */
pciBusInfo_t *pciBusInfo[MAX_PCI_BUSES] = { NULL, };
_X_EXPORT int pciNumBuses = 0; /* Actual number of PCI buses */
pciBusInfo_t *pciBusInfo = NULL;
_X_EXPORT int pciNumBuses = 0; /* Actual number of PCI buses */
_X_EXPORT ADDRESS
pciBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr)
{
int bus = PCI_BUS_FROM_TAG(tag);
if ((bus >= 0) && (bus < pciNumBuses) && pciBusInfo[bus] &&
pciBusInfo[bus]->funcs->pciAddrBusToHost)
return (*pciBusInfo[bus]->funcs->pciAddrBusToHost)(tag, type, addr);
else
return(addr);
if (pciBusInfo->funcs->pciAddrBusToHost)
return pciBusInfo->funcs->pciAddrBusToHost(tag, type, addr);
else
return addr;
}
_X_EXPORT PCITAG
......
......@@ -115,14 +115,10 @@
/*
* Global Definitions
*/
#if defined(sun) && defined(SVR4) && defined(sparc)
# define MAX_PCI_BUSES 4096 /* Max number of PCI buses */
#elif (defined(__alpha__) || defined(__ia64__)) && defined (linux)
# define MAX_PCI_DOMAINS 512
# define PCI_DOM_MASK 0x01fful
# define MAX_PCI_BUSES (MAX_PCI_DOMAINS*256) /* 256 per domain */
#if (defined(__alpha__) || defined(__ia64__)) && defined (linux)
#define PCI_DOM_MASK 0x01fful
#else
# define MAX_PCI_BUSES 256 /* Max number of PCI buses */
#define PCI_DOM_MASK 0x0ffu
#endif
#define DEVID(vendor, device) \
......@@ -245,6 +241,6 @@ void pciCfgMech1SetBits(PCITAG tag, int offset, CARD32 mask,
CARD32 val);
ADDRESS pciAddrNOOP(PCITAG tag, PciAddrType type, ADDRESS);
extern pciBusInfo_t *pciBusInfo[];
extern pciBusInfo_t *pciBusInfo;
#endif /* _PCI_H */
......@@ -80,7 +80,7 @@ void
bsdPciInit(void)
{
pciNumBuses = 1;
pciBusInfo[0] = &bsd_pci;
pciBusInfo = &bsd_pci;
xf86InitVidMem();
}
......@@ -470,185 +470,17 @@ ix86PciSelectCfgmech(void)
xf86MsgVerb(X_INFO, 2, "PCI: No PCI bus found\n");
}
#if 0
static pciTagRec
ix86PcibusTag(CARD8 bus, CARD8 cardnum, CARD8 func)
{
pciTagRec tag;
tag.cfg1 = 0;
if (func > 7 || cardnum >= pciBusInfo[bus]->numDevices)
return tag;
switch (ix86Pci0.configMech) {
case PCI_CFG_MECH_1:
tag.cfg1 = PCI_EN | ((CARD32)bus << 16) |
((CARD32)cardnum << 11) |
((CARD32)func << 8);
break;
case PCI_CFG_MECH_2:
tag.cfg2.port = 0xc000 | ((CARD16)cardnum << 8);
tag.cfg2.enable = 0xf0 | (func << 1);
tag.cfg2.forward = bus;
break;
}
return tag;
}
#endif
#if 0
static CARD32
ix86PciReadLongSetup(PCITAG Tag, int reg)
{
ix86PciSelectCfgmech();
return (*ix86Pci0.funcs->pciReadLong)(Tag,reg);
}
static CARD32
ix86PciReadLongCFG1(PCITAG Tag, int reg)
{
CARD32 addr, data = 0;
#ifdef DEBUGPCI
ErrorF("ix86PciReadLong 0x%lx, %d\n", Tag, reg);
#endif
addr = PCI_ADDR_FROM_TAG_CFG1(Tag,reg);
outl(PCI_CFGMECH1_ADDRESS_REG, addr);
data = inl(PCI_CFGMECH1_DATA_REG);
outl(PCI_CFGMECH1_ADDRESS_REG, 0);
#ifdef DEBUGPCI
ErrorF("ix86PciReadLong 0x%lx\n", data);
#endif
return data;
}
static CARD32
ix86PciReadLongCFG2(PCITAG Tag, int reg)
{
CARD32 addr, data = 0;
CARD8 forward, enable;
#ifdef DEBUGPCI
ErrorF("ix86PciReadLong 0x%lx, %d\n", Tag, reg);
#endif
forward = PCI_FORWARD_FROM_TAG(Tag);
enable = PCI_ENABLE_FROM_TAG(Tag);
addr = PCI_ADDR_FROM_TAG_CFG2(Tag,reg);
outb(PCI_CFGMECH2_ENABLE_REG, enable);
outb(PCI_CFGMECH2_FORWARD_REG, forward);
data = inl((CARD16)addr);
outb(PCI_CFGMECH2_ENABLE_REG, 0);
outb(PCI_CFGMECH2_FORWARD_REG, 0);
#ifdef DEBUGPCI
ErrorF("ix86PciReadLong 0x%lx\n", data);
#endif
return data;
}
static void
ix86PciWriteLongSetup(PCITAG Tag, int reg, CARD32 data)
{
ix86PciSelectCfgmech();
(*ix86Pci0.funcs->pciWriteLong)(Tag,reg,data);
}
static void
ix86PciWriteLongCFG1(PCITAG Tag, int reg, CARD32 data)
{
CARD32 addr;
addr = PCI_ADDR_FROM_TAG_CFG1(Tag,reg);
outl(PCI_CFGMECH1_ADDRESS_REG, addr);
outl(PCI_CFGMECH1_DATA_REG, data);
outl(PCI_CFGMECH1_ADDRESS_REG, 0);
}
static void
ix86PciWriteLongCFG2(PCITAG Tag, int reg, CARD32 data)
{
CARD32 addr;
CARD8 forward, enable;
forward = PCI_FORWARD_FROM_TAG(Tag);
enable = PCI_ENABLE_FROM_TAG(Tag);
addr = PCI_ADDR_FROM_TAG_CFG2(Tag,reg);
outb(PCI_CFGMECH2_ENABLE_REG, enable);
outb(PCI_CFGMECH2_FORWARD_REG, forward);
outl((CARD16)addr, data);
outb(PCI_CFGMECH2_ENABLE_REG, 0);
outb(PCI_CFGMECH2_FORWARD_REG, 0);
}
static void
ix86PciSetBitsLongSetup(PCITAG Tag, int reg, CARD32 mask, CARD32 val)
{
ix86PciSelectCfgmech();
(*ix86Pci0.funcs->pciSetBitsLong)(Tag,reg,mask,val);
}
static void
ix86PciSetBitsLongCFG1(PCITAG Tag, int reg, CARD32 mask, CARD32 val)
{
CARD32 addr, data = 0;
#ifdef DEBUGPCI
ErrorF("ix86PciSetBitsLong 0x%lx, %d\n", Tag, reg);
#endif
addr = PCI_ADDR_FROM_TAG_CFG1(Tag,reg);
outl(PCI_CFGMECH1_ADDRESS_REG, addr);
data = inl(PCI_CFGMECH1_DATA_REG);
data = (data & ~mask) | (val & mask);
outl(PCI_CFGMECH1_DATA_REG, data);
outl(PCI_CFGMECH1_ADDRESS_REG, 0);
}
static void
ix86PciSetBitsLongCFG2(PCITAG Tag, int reg, CARD32 mask, CARD32 val)
{
CARD32 addr, data = 0;
CARD8 enable, forward;
#ifdef DEBUGPCI
ErrorF("ix86PciSetBitsLong 0x%lx, %d\n", Tag, reg);
#endif
forward = PCI_FORWARD_FROM_TAG(Tag);
enable = PCI_ENABLE_FROM_TAG(Tag);
addr = PCI_ADDR_FROM_TAG_CFG2(Tag,reg);
outb(PCI_CFGMECH2_ENABLE_REG, enable);
outb(PCI_CFGMECH2_FORWARD_REG, forward);
data = inl((CARD16)addr);
data = (data & ~mask) | (val & mask);
outl((CARD16)addr, data);
outb(PCI_CFGMECH2_ENABLE_REG, 0);
outb(PCI_CFGMECH2_FORWARD_REG, 0);
}
#endif
void
ix86PciInit()
{
/* Initialize pciBusInfo[] array and function pointers */
/* Initialize pciBusInfo */
pciNumBuses = 1;
pciBusInfo[0] = &ix86Pci0;
pciBusInfo = &ix86Pci0;
/* Make sure that there is a PCI bus present. */
ix86PciSelectCfgmech();
if (ix86Pci0.configMech == PCI_CFG_MECH_UNKNOWN) {
pciNumBuses = 0;
pciBusInfo[0] = NULL;
pciBusInfo = NULL;
}
}
......@@ -115,7 +115,7 @@ linuxPciInit(void)
return;
}
pciNumBuses = 1;
pciBusInfo[0] = &linuxPci0;
pciBusInfo = &linuxPci0;
}
/**
......
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